SPD6729QCE Intel, SPD6729QCE Datasheet - Page 43

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SPD6729QCE

Manufacturer Part Number
SPD6729QCE
Description
PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
Manufacturer
Intel
Datasheet

Specifications of SPD6729QCE

Package
208MQFP
Operating Temperature
0 to 70 °C

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6.0
6.1
Datasheet
Register Name: Index
Index: n/a
Reserved
Figure 10. Operation Registers as PCI Double-Word I/O Space at
RW:0
Bit 7
Socket Index
Operation Registers
The PD6729’s internal Device Control, Window Mapping, Extension, and Timing registers are
accessed through a pair of Operation registers — an Index register and a Data register.
The Index register is accessed at the address programmed in the Base Address 0 register, and the
Data register (see
Address 0.
Base Address 0 Register (programmed at offset 10h)
Index
Bits 5-0: Register Index
These bits determine which of the 64 possible socket-specific registers will be accessed when the
Data register is next accessed by the processor. Note that some values of the Register Index field
are reserved, see
Bit 6: Socket Index
This bit determines which set of socket-specific registers is currently selected. When this bit is a
‘0’, a Socket A register is selected; when this bit is a ‘1’, a Socket B register is selected.
The Index register value determines which internal register should be accessed (read or written) in
response to each CPU access of the Data register. Each of the two possible PCMCIA sockets is
allocated 64 of the 256 locations in the internal register index space.
RW:0
Bit 6
3 + Base Address 0
Ignored
Table
Bit 5
“Data” on page
7.
2 + Base Address 0
Bit 4
47) is accessed by adding 1 to the address programmed in Base
Ignored
PCI-to-PC Card (PCMCIA) Controller — PD6729
Bit 3
Register Index
RW:000000
1 + Base Address 0
Indexed Register
Data to/from
Bit 2
Register Compatibility Type: 365
Base Address 0
Bit 1
Index Register
Register Per: chip
Bit 0
43

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