SPD6729QCE Intel, SPD6729QCE Datasheet - Page 72

• Manufacturer Part Number: SPD6729QCE
• Description: PCI To PC Card (PCMCIA) Controller 208-Pin MQFP
• Manufacturer: Intel

Specifications of SPD6729QCE

• Package: 208MQFP
• Operating Temperature: 0 to 70 °C

PD6729 — PCI-to-PC Card (PCMCIA) Controller
10.3
72
Register Name: Misc Control 2
Index: 1Eh
RI_OUT*
Is RI Out
IRQ15/
RW:0
Bit 7
Bit 7: FIFO Status / Flush FIFO
This bit controls FIFO operation and reports FIFO status. When this bit is set to a ‘1’ during write
operations, all data in the FIFO is lost. During read operations, when this bit is a ‘1’, the FIFO is
empty. During read operations when this bit is a ‘0’, the FIFO has valid data.
This bit is used to ensure the FIFO is empty before changing any registers; registers should not be
modified while the write FIFO is not empty.
FIFO contents will be lost whenever any of the following occur:
Misc Control 2
Bit 0: External Clock Enable
This bit determines whether the external clock option is enabled. When set to a ‘1’, a clock
supplied to IRQ14/EXT_CLK will be internally divided by two and used as the internal clock for
the socket interfaces. This feature facilitates PCMCIA transfer cycles when the PCI bus clock is
stopped to conserve power. When set to a ‘0’, the PCI_CLK input is divided by two and used as the
internal clock, which drives the socket interfaces and specifies their timing.
•
•
•
Bit 6
Value
RST# pin (
The card is removed.
V
0
1
0
1
CC
Reserved
RW:00
Power bit (see
FIFO not empty
FIFO empty
External clock is disabled; clocking of socket interfaces provided by PCI_CLK
IRQ14/EXT_CLK pin will be used as an external clock input to provide clocking of socket
interfaces.
Table
Bit 5
1) is a ‘0’.
“Bit 4: VCC Power” on page
Reserved
I/O Read
RW:0
Bit 4
5V Core
RW:0
Bit 3
52) is programmed to a ‘0’.
No operation occurs (default at reset)
Flush the FIFO
Suspend
Mode
RW:0
Bit 2
Register Compatibility Type: ext.
Low-Power
I/O Write
Dynamic
Mode
RW:1
Bit 1
Register Per: chip
Clock Enable
Datasheet
External
RW:0
Bit 0