MACH120-15JC Lattice, MACH120-15JC Datasheet - Page 14

• Manufacturer Part Number: MACH120-15JC
• Description: CPLD MACH 1 Family 48 Macro Cells 66.6MHz EECMOS Technology 5V 68-Pin PLCC
• Manufacturer: Lattice

Specifications of MACH120-15JC

• Package: 68PLCC
• Family Name: MACH 1
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 48
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 12
• Re-programmability Support: Yes
• Operating Temperature: 0 to 70 °C

TYPICAL I
V
The selected “typical” pattern is a 12-bit up/down counter. This pattern is programmed in each PAL block and is capable of being
loaded, enabled, and reset.
Maximum frequency shown uses internal feedback and a D-type register.
CC
= 5 V, T
I
CC
CC
A
(mA)
= 25 C
CHARACTERISTICS
150
125
100
75
50
25
0
0
10
20
MACH120-12/15
30
Frequency (MHz)
40
50
60
70
14129J-7
15