P87C554SBAA NXP Semiconductors, P87C554SBAA Datasheet - Page 47

• Manufacturer Part Number: P87C554SBAA
• Description: MCU 8-Bit 87C 80C51 CISC 16KB EPROM 5V 68-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P87C554SBAA

• Package: 68PLCC
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 16 MHz
• Ram Size: 512 Byte
• Program Memory Size: 16 KB
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 40
• Interface Type: I2C/UART
• On-chip Adc: 7-chx10-bit
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 3

Philips Semiconductors
Table 8.
Table 9.
2003 Jan 28
STATUS
STATUS
STATUS
STATUS
(S1STA)
(S1STA)
(S1STA)
(S1STA)
CODE
CODE
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
A0H
A8H
B0H
B8H
C0H
C8H
A STOP condition or
repeated START
condition has been
received while still
addressed as
SLV/REC or SLV/TRX
SLV/REC or SLV/TRX
Own SLA+R has
been received; ACK
h
has been returned
Arbitration lost in
SLA+R/W as master;
Own SLA+R has
been received, ACK
has been returned
Data byte in S1DAT
has been transmitted;
ACK has been
ACK has been
received
Data byte in S1DAT
has been transmitted;
NOT ACK h
NOT ACK has been
received
Last data byte in
S1DAT has been
transmitted (AA = 0);
ACK has been
received
SIO1 HARDWARE
SIO1 HARDWARE
SIO1 HARDWARE
SIO1 HARDWARE
STATUS OF THE
STATUS OF THE
STATUS OF THE
STATUS OF THE
Slave Receiver Mode (Continued)
Slave Transmitter Mode
di i
I
I
b
2
2
C BUS AND
C BUS AND
i
h
d (AA
b
b
d
0)
No STDAT action or
No STDAT action or
No STDAT action or
No STDAT action
Load data byte or
load data byte
Load data byte or
load data byte
Load data byte or
load data byte
No S1DAT action or
no S1DAT action or
no S1DAT action or
no S1DAT action
No S1DAT action or
no S1DAT action or
no S1DAT action or
no S1DAT action
TO/FROM S1DAT
TO/FROM S1DAT
TO/FROM S1DAT
TO/FROM S1DAT
APPLICATION SOFTWARE RESPONSE
APPLICATION SOFTWARE RESPONSE
STA
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
TO S1CON
TO S1CON
STO
STO
2
C, PWM, capture/compare,
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
47
SI
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
AA
01
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK will be received
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK bit will be received
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK bit will be received
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
NEXT ACTION TAKEN BY SIO1 HARDWARE
NEXT ACTION TAKEN BY SIO1 HARDWARE
80C554/87C554
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