723631L15PF Integrated Device Technology (Idt), 723631L15PF Datasheet - Page 15

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723631L15PF

Manufacturer Part Number
723631L15PF
Description
FIFO Mem Sync Dual Depth Bi-Dir 512 x 36 120-Pin TQFP
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 723631L15PF

Package
120TQFP
Configuration
Dual
Bus Directional
Bi-Directional
Density
18 Kb
Organization
512x36
Data Bus Width
36 Bit
Timing Type
Synchronous
Expansion Type
Depth
Typical Operating Supply Voltage
5 V
Operating Temperature
0 to 70 °C
NOTE:
1. t
A0 - A35
IDT723631/723641/723651 CMOS SyncFIFO™
512 x 36, 1,024 x 36 and 2,048 x 36
B0 -B35
cycles. If the time between the rising CLKA edge and rising CLKB edge is less than t
occur one CLKB cycle later than shown.
SKEW1
CLKA
CLKB
W/RB
W/RA
MBA
MBB
CSA
ENA
CSB
ENB
OR
IR
is the minimum time between a rising CLKA edge and a rising CLKB edge for OR to transition HIGH and to clock the next word to the FIFO output register in three CLKB
FIFO Empty
LOW
HIGH
LOW
HIGH
HIGH
LOW
t
ENS1
t
ENS2
t
DS
Figure 7. OR Flag Timing and First Data Word Fall Through when the FIFO is Empty
W1
t
Old Data in FIFO Output Register
SKEW1
t
t
t
DH
ENH2
ENH1
(1)
t
CLKH
1
t
CLK
t
CLKL
15
SKEW1
2
t
CLKH
, then the transition of OR HIGH and the first word load to the output register may
t
CLK
t
CLKL
t
POR
3
t
A
t
ENS1
COMMERCIAL AND INDUSTRIAL
t
POR
t
ENH1
TEMPERATURE RANGES
W1
3023 drw10

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