723631L15PF Integrated Device Technology (Idt), 723631L15PF Datasheet - Page 16

• Manufacturer Part Number: 723631L15PF
• Description: FIFO Mem Sync Dual Depth Bi-Dir 512 x 36 120-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 723631L15PF

• Package: 120TQFP
• Configuration: Dual
• Bus Directional: Bi-Directional
• Density: 18 Kb
• Organization: 512x36
• Data Bus Width: 36 Bit
• Timing Type: Synchronous
• Expansion Type: Depth
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C

NOTE:
1. t
NOTES:
1. t
2. FIFO write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = HIGH, MBB = LOW).
CLKA
CLKB
IDT723631/723641/723651 CMOS SyncFIFO™
512 x 36, 1,024 x 36 and 2,048 x 36
ENA
ENB
and rising CLKA edge is less than t
A0 - A35
and rising CLKB edge is less than t
B0 -B35
SKEW1
SKEW2
AE
CLKA
CLKB
W/RB
W/RA
MBA
CSB
MBB
ENB
CSA
ENA
OR
is the minimum time between a rising CLKB edge and a rising CLKA edge for IR to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge
is the minimum time between a rising CLKA edge and a rising CLKB edge for AE to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge
IR
FIFO Full
LOW
HIGH
HIGH
LOW
HIGH
LOW
Previous Word in FIFO Output Register
t
CLKH
t
ENS1
t
CLK
t
ENS1
t
CLKL
SKEW1
SKEW2
Figure 8. IR Flag Timing and First Available Write when the FIFO is Full
, then IR may transition HIGH one CLKA cycle later than shown.
, then AE may transition HIGH one CLKB cycle later than shown.
t
ENH1
t
SKEW2
X Word in FIFO
t
Figure 9. Timing for AE
t
t
SKEW1
ENH1
(1)
A
(1)
1
1
t
CLKH
AE
AE
AE
AE when FIFO is Almost-Empty
t
CLK
16
t
CLKL
2
t
PAE
2
Next Word From FIFO
t
PIR
(X+1) Words in FIFO
t
t
ENS1
ENS2
t
DS
Write
COMMERCIAL AND INDUSTRIAL
t
ENS1
t
t
PIR
ENH2
t
t
DH
ENH1
TEMPERATURE RANGES
t
ENH1
t
PAE
3023 drw11
3023 drw12