LPC1754FBD80,518 NXP Semiconductors, LPC1754FBD80,518 Datasheet - Page 12

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LPC1754FBD80,518

Manufacturer Part Number
LPC1754FBD80,518
Description
IC MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheet

Specifications of LPC1754FBD80,518

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-LQFP
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC1700
Maximum Speed
100 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
52
Interface Type
CAN/I2C/SPI/UART/USB
On-chip Adc
6-chx12-bit
Number Of Timers
4
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
Part Number:
LPC1754FBD80,518
Manufacturer:
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Quantity:
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LPC1754FBD80,518
Manufacturer:
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NXP Semiconductors
Table 3.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] When the system oscillator is not used, connect XTAL1 and XTAL2 as follows: XTAL1 can be left floating or can be grounded (grounding
[11] When the RTC is not used, connect VBAT to V
LPC1759_58_56_54_52_51
Product data sheet
Symbol
V
V
V
V
VREFP
VREFN
VBAT
SSA
DD(3V3)
DD(REG)(3V3)
DDA
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a ADC input,
digital section of the pad is disabled and the pin is not 5 V tolerant.
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
Pad provides digital I/O and USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and
Low-speed mode only). This pad is not 5 V tolerant.
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad with TTL levels and hysteresis. Internal pull-up and pull-down resistors disabled.
5 V tolerant pad with TTL levels and hysteresis and internal pull-up resistor.
5 V tolerant pad with 20 ns glitch filter providing digital I/O function with TTL levels and hysteresis.
Pad provides special analog functionality.
is preferred to reduce susceptibility to noise). XTAL2 should be left floating.
Pin description
Pin
9
21, 42,
56, 77
34, 67
8
10
12
16
[11]
…continued
Type
I
I
I
I
I
I
I
Description
analog ground: 0 V reference. This should nominally be the same voltage as V
but should be isolated to minimize noise and error.
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
3.3 V voltage regulator supply voltage: This is the supply voltage for the on-chip
voltage regulator only.
analog 3.3 V pad supply voltage: This should be nominally the same voltage as
V
power the ADC and DAC. This pin should be tied to 3.3 V if the ADC and DAC are
not used.
ADC positive reference voltage: This should be nominally the same voltage as
V
as a reference for ADC and DAC. This pin should be tied to 3.3 V if the ADC and
DAC are not used.
ADC negative reference voltage: This should be nominally the same voltage as
V
a reference for ADC and DAC.
RTC pin power supply: 3.3 V on this pin supplies the power to the RTC
peripheral.
All information provided in this document is subject to legal disclaimers.
DD(3V3)
DDA
SS
but should be isolated to minimize noise and error. Level on this pin is used as
DD(REG)(3V3)
but should be isolated to minimize noise and error. Level on this pin is used
but should be isolated to minimize noise and error. This voltage is used to
Rev. 7 — 29 March 2011
and leave RTCX1 floating.
LPC1759/58/56/54/52/51
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
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SS
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