LPC1754FBD80,518 NXP Semiconductors, LPC1754FBD80,518 Datasheet - Page 55

• Manufacturer Part Number: LPC1754FBD80,518
• Description: IC MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1754FBD80,518

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-LQFP
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC1700
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 52
• Interface Type: CAN/I2C/SPI/UART/USB
• On-chip Adc: 6-chx12-bit
• Number Of Timers: 4
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 15.
C
[1]
LPC1759_58_56_54_52_51
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 20. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
PERIOD
differential
data lines
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
11.8 USB interface
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver

on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
All information provided in this document is subject to legal disclaimers.
; 3.0 V
+ t
FDEOP

Rev. 7 — 29 March 2011
V
DD(3V3)
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 20
must accept as
EOP; see
Figure 20
t
r
/ t

f
Figure 20
Figure 20
3.6 V.
crossover point
LPC1759/58/56/54/52/51
extended
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
7.7
-
1.3
160
2
18.5
9
40
82
8.5
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2011. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
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