AD7609BSTZ Analog Devices Inc, AD7609BSTZ Datasheet - Page 12

58T8900

AD7609BSTZ

Manufacturer Part Number
AD7609BSTZ
Description
58T8900
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7609BSTZ

Resolution (bits)
18bit
Sampling Rate
250kSPS
Input Channel Type
Differential
Data Interface
Serial, SPI
Supply Voltage Range - Analog
4.75V To 5.25V
Rohs Compliant
Yes

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AD7609
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1, 37, 38, 48
2, 26, 35,
40, 41, 47
23
36, 39
49, 51, 53,
55, 57, 59,
61, 63
50, 52, 54,
56, 58, 60,
62, 64
34
44, 45
43, 46
42
Type
P
P
P
P
AI+
AI−
REF
DI
REF
REF
1
ANALOG INPUT
DECOUPLING CAPACITOR PIN
POWER SUPPLY
GROUND PIN
DATA OUTPUT
DIGITAL OUTPUT
DIGITAL INPUT
REFERENCE INPUT/OUTPUT
Mnemonic
AV
AGND
V
REGCAP
V1+ to V8+
V1− to V8−
REFIN/
REFOUT
REF SELECT
REFCAPA,
REFCAPB
REFGND
DRIVE
CC
Description
Analog Supply Voltage 4.75 V to 5.25 V. This supply voltage is applied to the internal front-end
amplifiers and to the ADC core. These supply pins should be decoupled to AGND.
Analog Ground. This pin is the ground reference point for all analog circuitry on the AD7609. All
analog input signals and external reference signals should be referred to these pins. All six of these
AGND pins should connect to the AGND plane of a system.
Logic Power Supply Input. The voltage (2.3 V to 5 V) supplied at this pin determines the operating
voltage of the interface. This pin is nominally at the same supply as the supply of the host interface
(that is, DSP, FPGA).
Decoupling Capacitor Pins for Voltage Output from Internal Regulator. These output pins should be
decoupled separately to AGND using a 1 μF capacitor. The voltage on these output pins is in the
range of 2.5 V to 2.7 V.
Analog Input V1+ to Analog Input V8+. These pins are the positive terminal of the true differential
analog inputs. The analog input range of these channels is determined by the RANGE pin.
Analog Input V1− to Analog Input V8−. These are the negative terminals of the true differential
analog inputs. The analog input range of these channels is determined by the RANGE pin. The signal
on this pin should be 180° out of phase with the corresponding Vx+ pin.
Reference Input/ Reference Output. The on-chip reference of 2.5 V is available on this pin for external
use if the REF SELECT pin is set to a logic high. Alternatively, the internal reference can be disabled by
setting the REF SELECT pin to a logic low and an external reference of 2.5 V can be applied to this
input. See the Internal/External Reference section. Decoupling is required on this pin for both the
internal or external reference options. A 10 μF capacitor should be applied from this pin to ground
close to the REFGND pins.
Internal/External Reference Selection Input. Logic input. If this pin is set to logic high, the internal
reference is selected and is enabled. If this pin is set to logic low, the internal reference is disabled and
an external reference voltage must be applied to the REFIN/REFOUT pin.
Reference Buffer Output Force/Sense Pins. These pins must be connected together and decoupled to
AGND using a low ESR 10 μF ceramic capacitor.
Reference Ground Pins. These pins should be connected to AGND.
PAR/SER SEL
FRSTDATA
CONVST A
CONVST B
RD/SCLK
RANGE
RESET
AGND
BUSY
AV
STBY
OS 0
OS 1
OS 2
DB0
CS
CC 1
10
12
13
14
15
16
11
2
3
4
5
6
7
8
9
Figure 7. Pin Configuration
Rev. 0 | Page 12 of 36
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PIN 1
(Not to Scale)
AD7609
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AV
AGND
REFGND
REFCAPB
REFCAPA
REFGND
REFIN/REFOUT
AGND
AGND
REGCAP
AV
AV
REGCAP
AGND
REF SELECT
DB15
CC
CC
CC

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