X25642 Intersil Corporation, X25642 Datasheet

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X25642

Manufacturer Part Number
X25642
Description
Manufacturer
Intersil Corporation
Datasheet

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3132-1.0 1/17/97 T5/C0/D1 SH
FUNCTIONAL DIAGRAM
Direct Write
FEATURES
64K
Xicor, Inc. 1994, 1995, 1996 Patents Pending
2MHz Clock Rate
Low Power CMOS
—<1 A Standby Current
—<5mA Active Current
2.7V To 5.5V Power Supply
SPI Modes (0,0 & 1,1)
8K X 8 Bits
—32 Byte Page Mode
Block Lock Protection
—Protect 1/4, 1/2 or all of E
Built-in Inadvertent Write Protection
—Power-Up/Down protection circuitry
—Write Enable Latch
—Write Protect Pin
Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
High Reliability
—Endurance: 100,000 cycles
—Data Retention: 100 Years
—ESD protection: 2000V on all pins
Packages
—8-Lead PDIP
—8-Lead SOIC
—14-Lead SOIC
—20-Lead TSSOP
AN19 • AN38 • AN41 • AN61
A V A I L A B L E
and Block Lock
A
Advanced SPI Serial E
PPLICATION
HOLD
Protection is a trademark of Xicor, Inc.
SCK
N
WP
SO
CS
OTE
SI
COMMAND
REGISTER
CONTROL
CONTROL
2
DECODE
STATUS
TIMING
WRITE
PROM Array
LOGIC
LOGIC
AND
AND
2
PROM with Block Lock
PROTECT
X25642
WRITE
LOGIC
1
DESCRIPTION
The X25642 is a CMOS 65,536-bit serial E
internally organized as 8K x 8. The X25642 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing
any number of devices to share the same bus.
The X25642 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25642 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as
a hardwire input to the X25642 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25642 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
X DECODE
LOGIC
TM
128
64
64
Characteristics subject to change without notice
Protection
32
DATA REGISTER
Y DECODE
128 X 256
8K BYTE
64 X 256
64 X 256
ARRAY
8
8K x 8 Bit
3132 ILL F01.1
2
PROM,
TM

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X25642 Summary of contents

Page 1

... PROM with Block Lock DESCRIPTION The X25642 is a CMOS 65,536-bit serial E internally organized The X25642 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple three-wire bus. The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines ...

Page 2

... The WP pin function is blocked when the WPEN bit in the status register is “0”. This allows the user to install the X25642 in a system with WP pin grounded and still be able to write to the status register. The WP pin func- tions will be enabled when the WPEN bit is set “1”. ...

Page 3

... WEL and WIP are read-only and automatically set by other operations. The Write-In-Process (WIP) bit indicates whether the X25642 is busy with a write operation. When set to a “1”, a write is in progress, when set to a “0”, no write is in progress. During a write, all other bits are set to “1”. ...

Page 4

... Status Figure 2 illustrates the read status register sequence. Blocks Register Write Sequence Protected Prior to any attempt to write data into the X25642, the Writable Writable “write enable” latch must first be set by issuing the Protected WREN instruction (See Figure 3 first taken ...

Page 5

... X25642 Operational Notes The X25642 powers-up in the following state: • The device is in the low power standby state. • A HIGH to LOW transition required to enter an active state and receive an instruction. • SO pin is high impedance. • The “write enable” latch is reset. ...

Page 6

... X25642 Figure 3. Write Enable Latch Sequence CS SCK SI SO Figure 4. Byte Write Operation Sequence SCK INSTRUCTION SI HIGH IMPEDANCE HIGH IMPEDANCE BIT ADDRESS 3132 ILL F05 ...

Page 7

... X25642 Figure 5. Page Write Operation Sequence SCK INSTRUCTION SCK DATA BYTE Figure 6. Write Status Register Operation Sequence CS SCK SI HIGH IMPEDANCE BIT ADDRESS ...

Page 8

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max. Supply Voltage +70 C X25642 +85 C X25642-2.7 +125 C 7037 FRM T06 Limits Units Min. Max – ...

Page 9

... X25642 EQUIVALENT A.C. LOAD CIRCUIT 5V 1.44K OUTPUT OUTPUT 1.95K 100pF A.C. OPERATING CHARACTERISTICS Data Input Timing Symbol f Clock Frequency SCK t Cycle Time CYC t CS Lead Time LEAD t CS Lag Time LAG t Clock HIGH Time WH t Clock LOW Time WL t Data Setup Time SU t Data Hold Time ...

Page 10

... X25642 Serial Output Timing CS SCK MSB OUT ADDR SI LSB IN Serial Input Timing CS t LEAD SCK MSB IN HIGH IMPEDANCE CYC MSB–1 OUT LAG DIS LSB OUT 3132 ILL F10 LAG t FI LSB IN ...

Page 11

... X25642 Hold Timing CS SCK SO SI HOLD 3132 ILL F12.1 11 ...

Page 12

... X25642 PACKAGING INFORMATION HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) TYP. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P 0.430 (10.92) 0.360 (9.14) PIN 1 INDEX PIN 1 0.300 (7.62) REF. SEATING PLANE 0.150 (3.81) 0.125 (3.18) ...

Page 13

... X25642 PACKAGING INFORMATION 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.150 (3.80) 0.158 (4.00) PIN 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7 0.004 (0.19) 0.050 (1.27) 0.010 (0.25 0.0075 (0.19) 0.250" 0.010 (0.25) ...

Page 14

... X25642 PACKAGING INFORMATION 14-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX PIN 1 0.014 (0.35) 0.020 (0.51) (4X) 7 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.41) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.150 (3.80) 0.158 (4.00) 0.336 (8.55) 0.345 (8.75) 0.004 (0.10) 0.010 (0.25 0.0075 (0.19) 0.250" 0.010 (0.25) FOOTPRINT 14 0 ...

Page 15

... X25642 PACKAGING INFORMATION 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .252 (6.4) .300 (6.6) .047 (1.20) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) Gage Plane Seating Plane .019 (.50) .029 (.75) Detail A (20X) ...

Page 16

... Blank = Commercial = + Industrial = – + Military = – +125 C Package P = 8-Lead Plastic DIP S = 14-Lead SOIC S8 = 8-Lead SOIC V = 20-Lead TSSOP X25642 8-Lead Plastic DIP S = 14-Lead SOIC Blank = 8 Lead SOIC V = 20-Lead TSSOP X Blank = 10%, – + 10%, – ...

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