ALC250 REALTEK, ALC250 Datasheet

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ALC250

Manufacturer Part Number
ALC250
Description
Manufacturer
REALTEK
Datasheet

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ALC250
ALC250-LF
TWO-CHANNEL AC’97 2.3 AUDIO CODEC
with EQUALIZER
DATASHEET
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com.tw
Track ID: JATR-1076-21
06 December 2005
Rev. 1.3

Related parts for ALC250

ALC250 Summary of contents

Page 1

... ALC250 ALC250-LF TWO-CHANNEL AC’97 2.3 AUDIO CODEC with EQUALIZER DATASHEET Realtek Semiconductor Corp. No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan Tel.: +886-3-578-0211. Fax: +886-3-577-6047 www.realtek.com.tw Rev. 1.3 06 December 2005 Track ID: JATR-1076-21 ...

Page 2

... Two-Channel AC’97 2.3 Audio Codec Summary First release. Change cover page. Add ordering information. 1.For ALC250-VD, pin-43 is Disable# (Section 9.10) 2.Serial interface signals are shifted to pin-44 and pin-45. 3. Add lead (Pb)-free and version package identification information on page 3 and on page 43. Update section 6.1.12 MX1A Record Select, page 11. ...

Page 3

... MX62 S/PDIF Input Channel Status [29:15]............................................................................ 18 6.2.3 MX64 EQualizer Control Index Port ........................................................................................ 18 6.2.4 MX64 EQualizer Control Data Port ......................................................................................... 19 6.2.5 MX6A Data Flow Control ......................................................................................................... 19 6 ISCOVERY ESCRIPTOR 6.3.1 MX62 PCI Sub System ID.......................................................................................................... 20 Two-Channel AC’97 2.3 Audio Codec Table of Contents V I ERSION DENTIFICATION (P ID-00 )................................................................................... 18 AGE H (P ID-01 ) .......................................................................................... 20 AGE H iii ALC250 DataSheet ................................................................. 3 Rev1.3 ...

Page 4

... ODE 9.7.1 ATE In Circuit Test Mode.......................................................................................................... 36 9.7.2 Vendor Specific Test Mode........................................................................................................ 36 9 OLTAGE OLUME 9.9 POWER OFF CD F UNCTION 10. APPLICATION CIRCUITS.............................................................................................................. 39 11. MECHANICAL DIMENSIONS ....................................................................................................... 41 11. MECHANICAL DIMENSIONS ....................................................................................................... 41 12. ORDERING INFORMATION ......................................................................................................... 43 Two-Channel AC’97 2.3 Audio Codec ..................................................................................................... 24 EGISTERS .......................................................................................................... 29 A ................................................................................................. 36 CCESS C ..................................................................................................... 37 ONTROL ............................................................................................................. 38 iv ALC250 DataSheet Rev1.3 ...

Page 5

... General Description The ALC250 is a 20-bit DAC and 18-bit ADC full duplex AC'97 2.3 compatible stereo audio CODEC designed for PC multimedia systems, including host/soft audio and AMR/CNR based designs. The ALC250 incorporates proprietary converter technology to achieve a high SNR, greater than 100 dB, sensing logics for device reporting, and Universal Audio Jack® to enhance user convenience ...

Page 6

... Block Diagram 3.1 Analog Mixer Two-Channel AC’97 2.3 Audio Codec Boost Boost Figure. Analog Mixer Diagram 1 ALC250 DataSheet Rev1.3 ...

Page 7

... SPDIF In 20-bit SPDIF Out Digital Process Engine DVOL DVOL Digital 1 DAC Original ADC 0 EQ&MIC ADC DVOL : Digital Volume Control Figure. Digial Data Path Diagram 2 ALC250 DataSheet SPDIF Input 1 SPDIF 0 0 Output 1 0 Digital 1 EQ Line-In CD-In Mixer MIC-In Block ... ...

Page 8

... Two-Channel AC’97 2.3 Audio Codec ALC250 LLLLLLL TXXXV ALC250 DataSheet LINE-IN-R 24 LINE-IN-L 23 MIC2 22 MIC1 21 20 CD-R CD-GND 19 CD-L 18 JD1 17 JD2 16 AUX-R ...

Page 9

... Analog input (1.6Vrms) Second MIC input Analog input (1.6Vrms) Line input Left channel Analog input (1.6Vrms) Line input Right channel Analog input (1.6Vrms) Line-Out Left channel Analog output w/o amplifier Line-Out Right channel Analog output w/o amplifier 4 ALC250 DataSheet Characteristic Definition =1.0V, V =2. =1.0V, V =2. =1.0V, V =2.0V ...

Page 10

... DVSS1 I 4 DVSS2 I 7 Two-Channel AC’97 2.3 Audio Codec Description Headphone Out Left ALC250: Analog output with amplifier / Analog input channel Headphone Out Left ALC250: Analog output with amplifier / Analog input channel Mono output / Analog output / Voltage output (2.5V/4.0V) Third reference voltage Description ...

Page 11

... DEV 6 ALC250 DataSheet MR5 MR4 MR3 MR2 MR1 MR0 8000h RM* X HPR HPR HPR HPR HPR ...

Page 12

... R/W Master Right Volume (MRV[5:0]) in 1.5 dB steps For MRV/MLV: 00h 3Fh 6.1.3 MX04 Headphone Default: 8000h Register 04h controls the headphone (ALC250) output volume. Each step in bits 5:0 and 13:8 correspond to 1.5dB in increase/decrease in volume, allowing 63 levels of volume, from 000000 to 111111. Bit Type 15 R/W Mute Control 0: Normal ...

Page 13

... The purpose of this register is to allow the PC Beep signals to pass through the ALC250, eliminating the need for an external system speaker/buzzer. The PC BEEP pin is directly routed (internally hardwired) to the LINE-OUTL & R pins. If the PC speaker/buzzer is eliminated recommended to connect the external speakers at all times so the POST codes can be heard during reset ...

Page 14

... Mute (-∞ dB 11: 29.5 dB (V=30*Vmic-in) +12 dB Gain 0dB gain -34.5dB Gain 1: Mute (-∞ dB) 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain 1: Mute (-∞ dB) 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain 9 ALC250 DataSheet Function Function Function Rev1.3 ...

Page 15

... PCM Volume (PLV[4:0]) in 1.5 dB steps 7:5 Reserved 4:0 R/W PCM Right Volume (PRV[4:0]) in 1.5 dB steps For PLV/PRV: Two-Channel AC’97 2.3 Audio Codec Function 1: Mute (-∞ dB) 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain Function 1: Mute (-∞ dB) 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain 10 ALC250 DataSheet Rev1.3 ...

Page 16

... Bit Type 15 R/W Mute Control 0: Normal 14:12 Reserved 11:8 R/W Left Record Gain Select (LRG[3:0]) in 1.5 dB steps 7:4 Reserved 3:0 R/W Right Record Gain Select (RRG[3:0]) in 1.5 dB steps For LRG/RRG: Two-Channel AC’97 2.3 Audio Codec Function Function 1: Mute (-∞ dB) 0Fh +22.5dB 00h 0 dB (No Gain) 11 ALC250 DataSheet Rev1.3 ...

Page 17

... Bit Type 15:3 Reserved, Read as 0 2:0 R/W Depth Control (DP[2:0]) 3D effect control Two-Channel AC’97 2.3 Audio Codec Function 1: Mute (-∞ dB) 0Fh +22.5dB 00h 0 dB (No Gain) Function 0: Off Function DP[2:0] Function DP[2:0] 000 0% (off) 100 001 12.5% 101 010 25% 110 011 37.5 111 12 ALC250 DataSheet Function 50% 67.5% 75% 100% Rev1.3 ...

Page 18

... This register is used to select a descriptor of 16 word pages between registers MX60 to MX6F. Value used to select vendor specific space to maintain compatibility with AC’97 2.2 vendor specific register. Once PG[3:0] is not 0000b and 0001b, ALC250 will return zero data for ACLINK mixer read command. Two-Channel AC’97 2.3 Audio Codec ...

Page 19

... Power down Mixer (Vref still on) 1: Power down PCM DAC 1: Power down PCM ADC and input MUX 0: Not yet ready 0: Not yet ready DAC Mixer Verf ACLINK Int CLK HP-OUT Blank: Don’t care 14 ALC250 DataSheet 1: Power down EAPD Rev1.3 ...

Page 20

... Enable 0: Disable 0 R/W VRA 1: Enable 0: Disable If VRA = 0, ALC250 ADC/DAC operate at fixed 48KHz sampling rate. Otherwise, it operates with variable sampling rate defined in MX2C and MX32. VRA also control write operation of MX2Cand MX32. Two-Channel AC’97 2.3 Audio Codec Function Left DAC slot # Right DAC slot # ...

Page 21

... MX2C PCM DAC Rate Default: BB80h The ALC250 allows adjustment of the output sample rate. This register is used to adjust the sample rate. By changing the values, sampling rates from 8000 to 48000 can be chosen. Bit ...

Page 22

... None 2 R/W Copyright (COPY) 0: Not asserted 1 R/W Non-Audio Data type (/AUDIO) 0: PCM data 0 R Professional or Consumer format (PRO) 0: Consumer format The ALC250 supports consumer channel status format, so this bit is always 0. The consumer channel status block (bit0~bit31 PRO=0 /AUDIO 8 9 CC0 CC1 ...

Page 23

... KHz Others: Reserved 7:4 R Cn[3:0] (Channel Number) 3:0 R Sn[3:0] (Source Number) 6.2.3 MX64 EQualizer Control Index Port Default: 0000h Bit Type 15:6 NA Reserved 3:0 R/W EQ Control Registers Index Two-Channel AC’97 2.3 Audio Codec Function 1: Not asserted 1: AC3 or other digital non-audio data 1: professional format Function 1: Locked Function 18 ALC250 DataSheet Rev1.3 ...

Page 24

... Enable, SPDIFI data will be added into PCM data to DAC after SPDIFI is locked. Two-Channel AC’97 2.3 Audio Codec Function Function controller. 1: (MIC1+MIC2)/2. 1: Stereo. Pin-47 Pin-16 EAPD (Out) S/PDIF-In (In) EAPD (Out) JD2 (In) S/PDIF-In (In) JD2 (In) JD2 (In) S/PDIF-In (In) Compatible with ALC202 19 ALC250 DataSheet Note (Default) Rev1.3 ...

Page 25

... MIC1 In 6h: MIC2 In 7h: LINE In Others: Not supported 0 R/W Tip or Ring Selection, T/R This bit sets which jack conductor the sense value is measured from combined with FC[3:0]. 0: Tip (Left channel) 1: Ring (Right channel) Two-Channel AC’97 2.3 Audio Codec Function Function Function 20 ALC250 DataSheet Rev1.3 ...

Page 26

... Not specified or unknown Other: Not supported This field reports the type of output/input peripheral plugged in the jack after sensing. 7:0 R Always read as 0. Two-Channel AC’97 2.3 Audio Codec Function 1: Inverted. Function 06h: Earphone or passive speaker 13h: Mono Microphone 15h: Stereo Line-In 21 ALC250 DataSheet Rev1.3 ...

Page 27

... No Jack-Detect event occurs. 1: Jack-Detect event occurs. JDEVT = JDS1 | JDS2 Software can check this bit and MX7A.1 to know the status of JDx. When MX7A.5=0, MX7A.1=JDS1. When MX7A.5=1, MX7A.1=JDS2 Reserved Two-Channel AC’97 2.3 Audio Codec Function 1: Enable 1: Enable 1: Enable. 1: Enable. Function 22 ALC250 DataSheet Rev1.3 ...

Page 28

... The two registers (MX7C Vendor ID1 and MX7E Vendor ID2) contain four 8-bit ID codes. The first three codes have been assigned by Microsoft for Plug and Play definitions. The fourth code is a Realtek assigned code identifying the ALC250. The MX7C Vendor ID1 register contains the value 414Ch, which is the first and second characters of the Microsoft ID code. The ...

Page 29

... Index-08h EQ Band-2 Gain (Band Pass Filter, BP2: Ho) Default: 0000h Bit Type 15:0 R/W 16-bit 2’s complement coefficient. Range 7.99. (Gain=-20dB ~ +20dB) 6.5.9 Index-09h EQ Band-3 Coefficient (Band Pass Filter, BP3: a1) Default: 0000h Bit Type Two-Channel AC’97 2.3 Audio Codec Function Function Function Function Function Function Function Function Function 24 ALC250 DataSheet Rev1.3 ...

Page 30

... Bit Type 15:0 R/W 16-bit 2’s complement coefficient. Range 1.99 6.5.17 Index-11h EQ Band-5 Gain (Band Pass Filter, BP5: Ho) Default: 0000h Bit Type 15:0 R/W 16-bit 2’s complement coefficient. Range 7.99. (Gain=-20dB ~ +20dB) Two-Channel AC’97 2.3 Audio Codec Function Function Function Function Function Function Function Function 25 ALC250 DataSheet Rev1.3 ...

Page 31

... Write to EQ coefficient-{a1,a1,Ho} will be ignored when specific control bit is enabled, it means modify individual EQ coefficients is forbidden when EQ is working. Two-Channel AC’97 2.3 Audio Codec Function Function 1: 40dB/decade slope (2 cascaded HP6) Function 1: Enable. 1: Enable. 1: Enable. 1: Enable. 1: Enable. 1: Enable. 1: Enable. 1: Overflow. 1: Overflow. 1: Overflow. 1: Overflow. 1: Overflow. 1: Overflow. 1: Overflow. 26 ALC250 DataSheet Rev1.3 ...

Page 32

... Bit Type 15 R/W Mute Control. 0: Turn on 1: Mute, force data to zero. (-∞ dB) 14:7 Reserved 6:0 R/W 7-bit Volume Ratio, EQMICVR[7:0] The multiplier ratio is EQMICVR[7:0]/128. (1/128 ~ 1) If 7-bit volume ratio is 7Fh, it means the multiplier is 1 (0dB). Two-Channel AC’97 2.3 Audio Codec Function Function 27 ALC250 DataSheet Rev1.3 ...

Page 33

... Two-Channel AC’97 2.3 Audio Codec Symbol Minimum DVDD 3.0 AVDD 3 Symbol Minimum V -0. 0.5*DVdd 0.9DVdd - 30k Minimum 10 28.8 10 28.8 28 ALC250 DataSheet Typical Maximum 3.3 3.6 5.0 5.5 - +70 +125 Typical Maximum - Dvdd+0.30 - 0.50*Dvdd - 1 0.1DVdd - 50k 100k Typical Maximum - 20.0 -76.0 +- 0.20 - 20.0 -78.5 +- 0.20 Units ...

Page 34

... Minimum T 1.0 rst_low T 162.8 rst2clk Cold reset timing diagram Symbol Minimum T 1.0 sync_high T 162.8 sync2clk Warm reset timing diagram Symbol Minimum - T - clk_period - T 36 clk_high T 36 clk_low - T - sync_period T - sync_high T - sync_low 29 ALC250 DataSheet Typical Maximum 3.3 0 0.5 Typical Maximum - - - - Typical Maximum - - - - Typical Maximum 12.288 - 81 750 40.7 45 40.7 45 48.0 - 20.8 - 1.3 - 19.5 - Units V V Units µ ...

Page 35

... Data Output and Input timing diagram Symbol Minimum Trise - clk Tfall - clk Trise - sync Tfall - sync Trise - din Tfall - din Trise - dout Tfall - dout ALC250 DataSheet Typical Maximum - 15 Typical Maximum - - - - Typical Maximum - Typical Maximum - Units ...

Page 36

... Rising edge of RESET# to Hi-Z delay Two-Channel AC’97 2.3 Audio Codec Signal Rise and Fall timing diagram Symbol Minimum T - s2_pdown AC-Link low power mode timing diagram Symbol Minimum T 15.0 setup2rst T - off ATE test mode timing diagram 31 ALC250 DataSheet Typical Maximum - 1.0 Typical Maximum - - - 25.0 Units µs Units ns ns Rev1.3 ...

Page 37

... Duty cycle = 100 * T Two-Channel AC’97 2.3 Audio Codec 1 CODEC 2 CODEC 55pF 62.5pF 47.5pF 55pF Minimum Typical (h) ( (r) ( (r) (l) ( (f) (l) ( (h) (l) (h) 32 ALC250 DataSheet 3 CODEC 4 CODEC 75pF 85pF 60pF 62.5pF Maximum Units 90% 10% Rev1.3 ...

Page 38

... Input impedance (gain = 0dB, mixer = off) LINE-IN, CD-IN, AUX-IN, MIC1 / MIC2 PCBEEP, PHONE cont… Two-Channel AC’97 2.3 Audio Codec 0 C, Dvdd=3.3V ±5%,Avdd=5.0V±5% =25 Minimum - - - - - - - - 10 D/A - A/D - D 20,000 28,800 - -34 4 ALC250 DataSheet Typical Maximum 1.6 - 1.0 - 1.6 - 0.16 - 1.25 - 1.25 - 100 - 100 - - 22,000 100 - 92 - - 20,000 - 28,800 ∞ - - 1 -94.5 1.5 ...

Page 39

... Output Impedance LINE-OUT HP-OUT MONO-OUT Amplifier Maximum Output Power @20Ω load Power Supply Current VA=5.0V VA=3.3V VD=3.3V Power Down Current VA=5.0V / 3.3V VD=3.3V Vrefout/Vrefout2/Vrefout3 Vrefout Drive Current Two-Channel AC’97 2.3 Audio Codec - 200 - 5 - 500 - - - 2. ALC250 DataSheet Ω Ω - Ω 1000 uA 700 uA 4 Rev1.3 ...

Page 40

... When the ALC250 receives serial data from the AC97 controller, it samples SDATA_OUT on the falling edge of BIT_CLK. When the ALC250 sends serial data to the AC97 controller, it starts to drive SDATA_IN on the rising edge of BIT_CLK. The ALC250 will return any uninstalled bits or registers with 0 for read operations. The ALC250 also stuffs the unimplemented slot or bit with 0 in SDATA_IN. Note that AC-LINK is MSB-justified. Refer to “ ...

Page 41

... It is important to pay special attention to the power down control register (index 26h), especially PR4 (powerdown AC-link). 9.7 Test Mode To provide compatibility with AC’97 rev2.2, the ALC250 will float its digital output pins in both ATE and Vendor-Specific test modes. Please refer to AC’97 rev2.2 section 9.2 for a detailed description of the test modes. ...

Page 42

... DC Voltage Volume Control The ALC250 has a 32-step internal volume control that is controlled by the DC voltage applied the ‘DC Vol’ pin (pin-32). The volume control input range is from GND to AVDD, to attenuate the master volume (real MX02), headphone volume (real MX04) and mono-out volume (real MX06). A higher DC voltage means more attenuation related to output volume. The table below shows the relation between input DC voltage and the 5-bit volume code ...

Page 43

... The ‘POWER OFF CD’ function describes a state which, after the system has been shut down and a +5V analog power is supplied at VAUX(pin-34), the ALC250 will turn on the CD-IN op and output amplifier possible to design a system which will save op-amp circuitry and bypass CD output directly to the speaker. ...

Page 44

... GPIO0 R56 0@203 Vol-Mute Vol-Down Vol-Up R54 4.7K +3.3VDD R63 R64 47K@250 47K@250 SCK R65 0@250 SCK SDA R66 0@250 SDA EQualizer Control by uP (ALC250 only) Optical U3 TOTX178 Transmitter 5 4 N.C N.C C32 0.1u +5VDD C38 R5 100 J6 1 SPDIF-OUT S/PDIF OUTPUT C40 0.01u (Coaxial) ...

Page 45

... HP-OUT-L Two-Channel AC’97 2.3 Audio Codec Standard Jack Connection (ALC250/203/202) R13 R12 2.2K@203/250, Mono MIC 4.7K@203/250,Stereo MIC R15 Internal MIC-IN R17 0 Jack Detect to bypass EQ while headphone is plugged in (ALC250 only) JD1 R56 10K@ALC250 C72 3.3u@ALC250 R59 R60 22K 22K Jack Connection - Standard Connection ...

Page 46

... BSC 0.217 0.354 BSC 0.276 BSC 0.217 APPROVE 0.007 0.008 0.011 0.0197 BSC CHECK 3.5 7 0.018 0.0236 0.030 0.0393 41 ALC250 DataSheet TITLE: LQFP-48 (7.0x7.0x1.6mm) PACKAGE OUTLINE DRAWING, FOOTPRINT 2.0mm LEADFRAME MATERIAL DOC. NO. VERSION DWG NO. DATE REALTEK SEMICONDUCTOR CORP. 02 PKGC-065 Rev1.3 ...

Page 47

... Realtek Semiconductor Corp. Headquarters No. 2, Innovation Road II Hsinchu Science Park, Hsinchu 300, Taiwan Tel.: +886-3-578-0211. Fax: +886-3-577-6047 www.realtek.com.tw Two-Channel AC’97 2.3 Audio Codec Package Standard product. LQFP-48 ALC250 with Lead (Pb)-Free package 43 ALC250 DataSheet Status Production Production Rev1.3 ...

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