N80C51BHP Intel Corporation, N80C51BHP Datasheet
N80C51BHP
Related parts for N80C51BHP
N80C51BHP Summary of contents
Page 1
... Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata COPYRIGHT INTEL CORPORATION 1995 Commercial Express 5 Interrupt Sources ...
Page 2
Standard 80C31BH 80C51BH 80C51BHP 87C51 NOTES 3 5 MHz to 12 MHz MHz to 16 MHz MHz to 12 ...
Page 3
PROCESS INFORMATION The 87C51 BH is manufactured on the CHMOS III-E process Additional process and reliability informa- tion is available in Intel’s Components Quality and Reliability Handbook Order No 210997 DIP Do not connect reserved pins 87C51 80C51BH 80C31BH PACKAGES ...
Page 4
PIN DESCRIPTION V Supply voltage during normal Idle and Power CC Down operations V Circuit ground SS Port 0 Port 8-bit open drain bidirectional I O port As an output port each pin can ...
Page 5
In normal operation ALE is emitted at a constant rate the oscillator frequency and may be used for external timing or clocking purposes Note however that one ALE pulse is skipped during each access to external Data ...
Page 6
IDLE MODE In Idle Mode the CPU puts itself to sleep while all the on-chip peripherals remain active The mode is invoked by software The content of the on-chip RAM and all the Special Functions Registers remain ...
Page 7
ONCE MODE The ONCE (‘‘On-Circuit Emulation’’) mode facilitates testing and debugging of systems using the 87C51 BH without the 87C51 BH having to be re- moved from the circuit The ONCE mode is invoked by 1 Pull ALE low while ...
Page 8
ABSOLUTE MAXIMUM RATINGS Ambient Temperature Under Bias Storage Temperature Voltage Pin Voltage on Any Other Pin ...
Page 9
DC CHARACTERISTICS (Over Operating Conditions) (Continued) Symbol Parameter (6) V Output Low Voltage OL1 (Port 0 ALE PSEN) V Output High Voltage OH (Ports ALE PSEN) V Output High Voltage OH1 (Port 0 in External Bus Mode) ...
Page 10
NOTES 1 ‘‘Typicals’’ are based on a limited number of samples taken from early manufacturing lots and are not guaranteed The values listed are at room temp 5V 2 Capacitive loading on Ports 0 and 2 may ...
Page 11
Figure 6 I Test Condition Active Mode All other pins are disconnected CC 272335–8 Figure 7 I Test Condition Idle Mode CC All other pins are disconnected Figure 8 Clock Signal Waveform for I TCLCH 87C51 80C51BH 80C31BH 272335 –10 ...
Page 12
EXPLANATION OF THE AC SYMBOLS Each timing symbol has 5 characters The first char- acter is always a ‘T’ (stands for time) The other characters depending on their positions stand for the name of a signal or ...
Page 13
EXTERNAL MEMORY CHARACTERISTICS All parameter values apply to all devices unless otherwise indicated In this table 87C51 BH refers to 87C51 BH 87C51-1 BH-1 and 87C51-2 BH-2 (Continued) Symbol Parameter TPXIX Input Instr Hold After PSEN TPXIZ Input Instr Float ...
Page 14
EXTERNAL MEMORY CHARACTERISTICS All parameter values apply to all devices unless otherwise indicated In this table 87C51 BH refers to 87C51 BH 87C51-1 BH-1 and 87C51-2 BH-2 (Continued) Symbol Parameter TWHQX Data Hold After WR 87C51 BH ...
Page 15
EXTERNAL DATA MEMORY WRITE CYCLE EXTERNAL CLOCK DRIVE All parameter values apply to all devices unless otherwise indicated In this table 87C51 BH refers to 87C51 BH 87C51-1 BH-1 and 87C51-2 BH-2 Symbol Parameter 1 TCLCL Oscillator Frequency 87C51 BH ...
Page 16
SERIAL PORT TIMING SHIFT REGISTER MODE 12 MHz Symbol Parameter Oscillator Min TXLXL Serial Port Clock 1 0 Cycle Time TQVXH Output Data Setup 700 to Clock Rising Edge TXHQX Output Data Hold After Clock Rising Edge ...
Page 17
PROGRAMMING THE 87C51 The part must be running with a 4 MHz to 6 MHz oscillator The address of an EPROM location to be programmed is applied to address lines while the code byte to be programmed in that location ...
Page 18
For compatibility 25 pulses may be used Figure 11 Programming Waveforms PROGRAMMING ALGORITHM Refer to Table 4 and Figures 10 and 11 for address data and control signals set up To program the 87C51 the following sequence ...
Page 19
Program Lock Bits The 87C51 has 3 programmable lock bits that when programmed according to Table 5 will provide differ- ent levels of protection for the on-chip code and data Erasing the EPROM also erases the encryption ar- ray and ...
Page 20
EPROM PROGRAMMING EPROM AND ROM VERIFICATION CHARACTERISTICS ( 10 Symbol Parameter V Programming Supply Voltage PP I Programming Supply Current PP 1 TCLCL Oscillator ...
Page 21
Thermal Impedance All thermal impedance data is approximate for static air conditions power dissipation Values will change depending on operating conditions and ap- plications See the Intel Packaging Handbook (Order No 240800) for a description of Intel’s ...