CS82C88 Intersil Corporation, CS82C88 Datasheet
CS82C88
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CS82C88 Summary of contents
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... Static CMOS circuit design insures low operating power. The Intersil advanced SAJI process results in performance equal to or greater than existing equivalent products at a significant power savings. Ordering Information PART NUMBER CP82C88 CP82C88-10 IP82C88 CS82C88 IS82C88 +70 C CD82C88 +85 ...
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Functional Diagram CLK AEN CONTROL INPUT CEN IOB Pin Description PIN SYMBOL NUMBER TYPE GND 10 GROUND. S0, S1 STATUS INPUT PINS: These pins are the input ...
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Pin Description (Continued) PIN SYMBOL NUMBER TYPE AIOWC 12 O ADVANCED I/O WRITE COMMAND: The AIOWC issues an I/O Write Command earlier in the machine cycle to give I/O devices an early indication of a write instruction. Its timing is ...
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INTA (Interrupt Acknowledge) acts as an I/O read during an interrupt cycle. Its purpose is to inform an interrupting device that its interrupt is being acknowledged and that it should place vectoring information onto the data bus. The command outputs ...
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Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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AC Electrical Specifications SYMBOL PARAMETER TIMING REQUIREMENTS (1) TCLCL CLK Cycle Period (2) TCLCH CLK Low Time (3) TCHCL CLK High Time (4) TSVCH Status Active Setup Time (5) TCHSV Status Inactive ...
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Timing Waveforms (Note 3) T STATE 4 CLK TCHSV (5) S2, S1, S0 ADDRESS/DATA TCLLH (10) ALE MRDC, IORC, INTA, AMWC, AIOWC MWTC, IOWC DEN (READ) (INTA) PDEN (READ) (INTA) DEN (WRITE) PDEN (WRITE) TCHDTH (18) DT/R (READ) (INTA) MCE ...
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Timing Waveforms (Note 3) (Continued) CEN AEN DEN PDEN AEN 1.5V TAELCH (19) OUTPUT COMMAND CEN CEN MUST BE LOW OR INVALID PRIOR PREVENT THE COMMAND FROM BEING GENERATED. FIGURE 3. ADDRESS ENABLE (AEN) TIMING (THREE-STATE ENABLE/DISABLE) ...
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Burn-In Circuits NOTES 5.5V ...
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... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...