TB28F800B5T80 Intel Corporation, TB28F800B5T80 Datasheet

no-image

TB28F800B5T80

Manufacturer Part Number
TB28F800B5T80
Description
5 VOLT BOOT BLOCK FLASH MEMORY
Manufacturer
Intel Corporation
Datasheet
n
n
n
n
n
n
n
The Intel
density, low-cost, nonvolatile, read/write storage solutions for a wide range of applications. Their
asymmetrically-blocked architecture, flexible voltage, and extended cycling provide highly flexible
components suitable for embedded code execution applications, such as networking infrastructure and office
automation.
Based on Intel
upgrades for designs that demand state-of-the-art technology. This family of products comes in industry-
standard packages: the 40-lead TSOP for very space-constrained 8-bit applications, 48-lead TSOP, ideal for
board-constrained higher-performance 16-bit applications, and the rugged, easy to handle 44-lead PSOP.
NOTE: This document formerly known as Smart 5 Boot Block Flash Memory Family 2, 4, 8 Mbit .
June 1999
SmartVoltage Technology
Very High-Performance Read
x8 or x8/x16-Configurable Data Bus
Low Power Consumption
Optimized Array Blocking Architecture
Extended Temperature Operation
Industry-Standard Packaging
–40 °C to +85 °C
5 Volt Boot Block Flash:
5 V Reads, 5 V or 12 V Writes
Increased Programming Throughput
at 12 V V
2-, 4-Mbit: 55 ns Access Time
8-Mbit: 70 ns Access Time
Max 60 mA Read Current at 5 V
Auto Power Savings: <1 mA Typical
Standby Current
16-KB Protected Boot Block
Two 8-KB Parameter Blocks
96-KB and 128-KB Main Blocks
Top or Bottom Boot Locations
40, 48-Lead TSOP, 44-Lead PSOP
®
5 Volt Boot Block Flash memory family provides 2-, 4-, and 8-Mbit memories featuring high-
®
Boot Block architecture, the 5 Volt Boot Block Flash memory family enables quick and easy
PP
28F200B5, 28F004/400B5, 28F800B5 (x8/x16)
5 VOLT BOOT BLOCK
FLASH MEMORY
n
n
n
n
n
n
n
Extended Block Erase Cycling
Hardware Data Protection Feature
Automated Word/Byte Program and
Block Erase
SRAM-Compatible Write Interface
Reset/Deep Power-Down Input
Pinout Compatible 2, 4, and 8 Mbit
ETOX™ Flash Technology
100,000 Cycles at Commercial Temp
10,000 Cycles at Extended Temp
30,000 Cycles for Parameter Blocks
and 1,000 Cycles for Main Blocks at
Automotive Temperature
Absolute Hardware-Protection for
Boot Block
Write Lockout during Power
Transitions
Command User Interface
Status Registers
Erase Suspend Capability
Provides Low-Power Mode and
Reset for Boot Operations
0.6
0.4
ETOX IV Initial Production
ETOX V Later Production
PRELIMINARY
Order Number: 290599-007

Related parts for TB28F800B5T80

TB28F800B5T80 Summary of contents

Page 1

VOLT BOOT BLOCK FLASH MEMORY 28F200B5, 28F004/400B5, 28F800B5 (x8/x16) n SmartVoltage Technology 5 Volt Boot Block Flash Reads Writes Increased Programming Throughput Very High-Performance Read 2-, ...

Page 2

... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel’s website at http://www.intel.com COPYRIGHT © INTEL CORPORATION 1997, 1998, 1999 *Other brands and names are the property of their respective owners. CG-041493 ...

Page 3

INTRODUCTION..............................................5 1.1 Product Overview .........................................5 2.0 PRODUCT DESCRIPTION ..............................6 2.1 Pin Descriptions ...........................................6 2.2 Pinouts .........................................................8 2.3 Memory Blocking Organization...................10 2.3.1 One 16-KB Boot Block.........................10 2.3.2 Two 8-KB Parameter Blocks................10 2.3.3 Main Blocks - One 96-KB + Additional 128-KB ...

Page 4

REVISION HISTORY Number -001 Original Version -002 Minor changes throughout document. Section 3.1.5 and Figure 14 redone to clarify program/erase operation abort. Information added to Table 2, Figure 1, and Section 3.3 to clarify WP# on 8-Mbit, ...

Page 5

INTRODUCTION This datasheet contains specifications for 2-, 4-, and 8-Mbit 5 Volt Boot Block Flash memories. Section 1.0 provides a feature overview. Sections 2.0, 3.0, and 4.0 describe the product and functionality. Section 5.0 details the electrical and timing ...

Page 6

SmartVoltage technology enables fast factory programming and low-power designs. Specifically designed for 5 V systems, 5 Volt Boot Block Flash components support read operations and internally configure to program/erase ...

Page 7

Table 2. Pin Descriptions Symbol Type ADDRESS INPUTS for memory addresses. Addresses are internally latched A –A INPUT 0 18 during a write cycle. 28F200: A[0–16], 28F400: A[0–17], 28F800: A[0–18], 28F004: A[0–18] A INPUT ADDRESS INPUT: When A 9 this ...

Page 8

Table 2. Pin Descriptions (Continued) Symbol Type WP# INPUT WRITE PROTECT: Provides a method for unlocking the boot block with a logic level signal in a system without supply. When WP logic ...

Page 9

WP# WP ...

Page 10

WE ...

Page 11

BOOT BLOCK 1E000H 3E000H 3DFFFH 1DFFFH 8-Kbyte PARAMETER BLOCK 1D000H 3D000H 3CFFFH 1CFFFH 8-Kbyte PARAMETER BLOCK 1C000H 3C000H 3BFFFH 1BFFFH 96-Kbyte MAIN BLOCK 10000H 30000H 2FFFFH 0FFFFH 128-Kbyte MAIN BLOCK 20000H 00000H 1FFFFH 10000H 0FFFFH 00000H ...

Page 12

BOOT BLOCK 7C000H 3C000H 7BFFFH 3BFFFH 8-Kbyte PARAMETER BLOCK 7A000H 3A000H 79FFFH 39FFFH 8-Kbyte PARAMETER BLOCK 78000H 38000H 77FFFH 37FFFH 96-Kbyte MAIN BLOCK 60000H 20000H 5FFFFH 1FFFFH 128-Kbyte MAIN BLOCK 40000H 00000H 3FFFFH ...

Page 13

PRINCIPLES OF OPERATION The system processor accesses the 5 Volt Boot Block Flash memories through the Command User Interface (CUI), which accepts commands written with standard microprocessor write timings and TTL-level control inputs. The flash can be switched into ...

Page 14

OUTPUT DISABLE With OE logic-high level (V ), the device IH outputs are disabled. Output pins (if available on the device) DQ –DQ are placed in a high impedance state. 3.1.3 STANDBY ...

Page 15

Table 3. Bus Operations for Word-Wide Mode (BYTE Mode Notes RP# Read 1,2 Output Disable V IH Standby V IH Deep Power-Down Intelligent Identifier (Mfr.) Intelligent Identifier 4 ...

Page 16

Modes of Operation The flash memory has three read modes and two write modes. The read modes are read array, read identifier, and read status. The write modes are program and block erase. An additional mode, ...

Page 17

Issue the Clear Status Register command (50H) ...

Page 18

To resume the erase operation, enable the chip by taking CE then issue the Erase Resume IL command, which continues the erase sequence to Table 6. Command Codes and Descriptions Code Device Mode 00 ...

Page 19

Table 6. Command Codes and Descriptions (Continued) Code Device Mode 50 Clear Status The WSM can only set the program status and erase status bits in the status Register register to “1”; it cannot clear them to “0.” The status ...

Page 20

Table 8. Status Register Bit Definition WSMS ESS SR.7 WRITE STATE MACHINE STATUS 1 = Ready 0 = Busy SR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase In Progress/Completed ...

Page 21

Start Write 40H, Word/Byte Address Write Word/Byte Data/Address Read Status Register NO SR YES Full Status Check if Desired Word/Byte Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range ...

Page 22

Start Write 20H, Block Address Write D0H and Block Address Read Status Register Suspend Erase Loop NO 0 YES Suspend SR.7 = Erase 1 Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read ...

Page 23

Start Write B0H Write 70H Read Status Register 0 SR SR.6 = Erase Resumed 1 Write FFH Read Array Data No Done Reading Yes Write D0H Write FFH Read Array Data Erase Resumed Figure 10. Erase Suspend/Resume ...

Page 24

Boot Block Locking The boot block family architecture features a hardware-lockable boot block so that the kernel code for the system can be kept secure while the parameter and main blocks are programmed and erased independently ...

Page 25

STANDBY POWER When CE logic-high level (V ), and the IH device is not programming or erasing, the memory enters in standby mode, which disables much of the device’s circuitry and substantially reduces power consumption. Outputs ...

Page 26

ELECTRICAL SPECIFICATIONS 5.1 Absolute Maximum Ratings* Commercial Operating Temperature During Read/Erase/Program...... 0 °C to +70 °C Temperature Under Bias........ –10 °C to +80 °C Extended Operating Temperature During Read/Erase/Program.. –40 °C to +85 °C Temperature Under ...

Page 27

Capacitance ° MHz A Symbol Parameter Note C Input Capacitance Output Capacitance 4, 7 OUT 1. Sampled, not 100% tested. 5.4 DC Characteristics—Commercial and Extended Temperature Temp Sym Parameter Note ...

Page 28

DC Characteristics—Commercial and Extended Temperature Temp Sym Parameter Note Typ Max Typ Max Unit I V Program Current 1,4 PP PPW (Word or Byte Mode Erase Current 1,4 PP PPE I V Erase Susp ...

Page 29

NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at V product versions (packages and speeds specified with the device deselected. If the device is read while in erase suspend mode, current draw is ...

Page 30

DC Characteristics—Automotive Temperature Sym Parameter Notes I V Read Current for 1,5,6 CCR CC Word or Byte I V Program Current for 1,4 CCW CC Word or Byte I V Erase Current 1,4 CCE CC I ...

Page 31

DC Characteristics—Automotive Temperature Sym Parameter Notes I V Erase Current 1 PPE Erase Suspend 1 PPES PP Current I RP# Boot Block Unlock 1,4 RP# Current I A Intelligent Identifier 1 Current V A ...

Page 32

NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at V product versions (packages and speeds specified with the device deselected. If the device is read while in erase suspend mode, ...

Page 33

DEVICE UNDER TEST NOTE: C includes jig capacitance. L Figure 13. Test Configuration Test Configuration Component Values Test Configuration C (pF Standard Test 100 ...

Page 34

AC Characteristics—Read Operations—Commercial and Extended Temperature # Sym Parameter t Read Cycle 2, 4 Mbit R1 AVAV Time 8 Mbit R2 t Address Mbit AVQV Output Delay 8 Mbit R3 t CE# to ...

Page 35

AC Characteristics—Read Operations—Automotive Temperature # Sym Parameter R1 t Read Cycle Time AVAV R2 t Address to Output Delay AVQV R3 t CE# to Output Delay ELQV R4 t OE# to Output Delay GLQV R5 t RP# to Output ...

Page 36

Device and Address Selection V IH ADDRESSES (A) Address Stable CE# ( OE# ( WE# ( High Z DATA (D/Q) ...

Page 37

Erase and Program Timings—Automotive Temperature ± 10 Parameter Boot/Parameter Block Erase Time Main Block Erase Time Main Block Write Time (Byte Mode) Main Block Write Time (Word Mode) NOTES: 1. All numbers ...

Page 38

AC Characteristics—Write Operations—Commercial and Extended Temperature # Sym RP# High Recovery to WE# (CE#) Going PHWL PHEL Low CE# (WE#) Setup to WE# (CE#) Going ELWL WLEL Low ...

Page 39

AC Characteristics—Write Operations—Automotive Temperature # Sym Parameter W0 t Write Cycle Time AVAV RP# High Recovery to WE# PHWL PHEL (CE#) Going Low CE# (WE#) Setup to WE# ELWL WLEL (CE#) ...

Page 40

ADDRESSES [ CE#(WE#) [E(W OE# [ WE#(CE#) [W(E High Z DATA [D/ ...

Page 41

ORDERING INFORMATION Operating Temperature/Package E = Comm.l Temp. TSOP TE = Ext. Temp. TSOP PA = Comm. Temp. 44-Lead PSOP TB = Ext. Temp. 44-Lead PSOP AB = Automotive Temp. ...

Page 42

ADDITIONAL INFORMATION Order Number 292194 AB-65 Migrating SmartVoltage Boot Block Flash Designs to 5 Volt Boot Block Flash 5 Volt Boot Block Flash Memory Family 28F200B5, 28F004/400B5, 28F800B5 297862 Specification Update Note 3 2-Mbit SmartVoltage Boot ...

Page 43

WRITE STATE MACHINE: CURRENT-NEXT STATE CHART Current SR.7 Data Read Program State When Array Setup Read (FFH) (10/40H) Read Read Program Array “1” Array Array Setup Program Setup “1” Status Program: Not “0” Status Complete Program: Read Program Complete “1” ...

Page 44

PRODUCT BLOCK DIAGRAM 44 APPENDIX B PRELIMINARY 7769_01 ...

Related keywords