AK4564VQ AKM Semiconductor, Inc., AK4564VQ Datasheet
AK4564VQ
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AK4564VQ Summary of contents
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CODEC with built-in ALC and MIC/HP/SPK-Amp The AK4564 is a 16bit stereo CODEC with a built-in Microphone-Amp, Headphone-Amp and Speaker-Amp. AK4564 has new recording features, a digital equalizer for microphone inputs and a digital ALC (Automatic Level Control). The ...
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INTL Pre-Amp EXTL MPWR MIC Power Supply MRF MVDD MVSS MIC AVDD AVSS VCOM MUTE HVDD HVCM MUTET HPL HPR HPP SVDD SVSS SPKP SPK Power Management BEEP2 MS0140-E-01 LIN1 LIN2 BEEP1 RIN2 ADC EQ LPF HPF ADC AOUTP2 ALC2 ...
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ASAHI KASEI No. Pin Name I/O Power Supply 5 SVDD - Speaker Amp Power Supply Pin, +3.0V 6 SVSS - Speaker Amp Ground Pin 15 DVDD - Digital Power Supply Pin, +2.8V 16 DVSS - Digital Ground Pin 28 HVDD ...
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No. Pin Name I/O Headphone Amp 26 HPL O Lch Headphone Amp Output Pin 27 HPR O Rch Headphone Amp Output Pin 29 MUTET O Headphone Amp MUTE Capacitor Pin Speaker Amp Block 1 SP0 O Speaker Amp positive Output ...
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... ASAHI KASEI n Ordering Guide AK4564VQ -20 +85 C AKD4564 Evaluation board for AK4564 n Pin layout SP0 1 MUTE 2 SP1 3 PDN 4 SVDD 5 SVSS 6 BCLK 7 MCLK 8 LRCK 9 CDTI 10 CSN 11 CCLK 12 MS0140-E-01 48pin LQFP (0.5mm pitch) 36 BEEP1 35 MIN 34 MOUT 33 VCOM AK4564 32 AVDD 31 AVSS 30 HVCM Top View 29 MUTET ...
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ASAHI KASEI (AVSS, DVSS, MVSS, SVSS=0V;Note 1) Parameter Power Supplies Analog 1 Analog 2 MIC Digital Speaker | DVSS – AVSS | (Note 2) | MVSS – AVSS | (Note 2) | SVSS – AVSS | (Note 2) Input Current ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, MVDD=2.8V, SVDD=3.0V, HVDD=4.5V; AVSS, DVSS, MVSS, SVSS=0V; fs=48kHz; Input Frequency =1kHz; Measurement width=20Hz Parameter Pre-Amp Characteristics: Input Resistance (INTL, INTR, EXTL, EXTR pins) Maximum Output Voltage (Note 11) Gain Load Resistance (Note 12) Load ...
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ASAHI KASEI (Continue) Parameter DAC Analog Output characteristics: Measured via LOUT1/ROUT1, LOUT2/ROUT2, VOL=+6.5dB Resolution S/(N+D) (0dBFS) DR (-60dBFS, A-Weighted) S/N (A-Weighted) Output Voltage (Note 19) Interchannel Isolation Interchannel Gain Mismatch Load Resistance Load Capacitance (Note 13) Headphone-Amp Characteristics: DAC à ...
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ASAHI KASEI (Continue) Parameter Monaural Input: (MIN pin) Maximum Input Voltage (Note 22) Input Resistance Monaural Output: DAC à MIX à MOUT pin Output Voltage (Note 23) Load Resistance Load Capacitance (Note 13) BEEP1 Input: BEEP1 pin Maximum Output Voltage ...
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ASAHI KASEI (Ta=25 C; AVDD, DVDD, SVDD=2.6 3.6V, MVDD, HVDD=2.6 5.5V; fs=48kHz; De-emphasis = OFF, Digital EQ/HPF/LPF = OFF) Parameter ADC Digital Filter (LPF): Passband (Note 28) 0.1dB -1.0dB -3.0dB Stopband (Note 28) Passband Ripple Stopband Attenuation Group Delay (Note ...
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C; AVDD, DVDD, SVDD=2.6 3.6V, MVDD, HVDD=2.6 5.5V) Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage Iout=-200 A Low-Level Output Voltage Iout=200 A Input Leakage Current (Ta=25 C; AVDD, DVDD, SVDD=2.6 3.6V, MVDD, HVDD=2.6 5.5V; C Parameter ...
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Timing Diagram MCLK tCLKH LRCK BCLK tBLKH LRCK tBLR BCLK tLRM SDTO D0 (LSB) SDTI Figure 4. Audio Data Input/Output Timing (Audio I/F format: No. 0) MS0140-E-01 1/fCLK tCLKL 1/fs tBLK tBLKL Figure 3. Clock Timing tLRB tBSD D15 ...
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ASAHI KASEI CSN tCSS CCLK CDTI CSN CCLK CDTI D3 PDN SDTO MS0140-E-01 tCCKL tCCKH tCDS tCDH op2 op1 0 Figure 5. WRITE Command Input Timing D2 D1 Figure 6. WRITE Data Input Timing tPDW tPDV Figure 7. Reset Timing ...
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System Clock The clocks required to operate are MCLK (256fs/384fs), LRCK (fs) and BCLK (32fs ). The master clock (MCLK) should be synchronized with LRCK. The phase between these clocks does not matter. The frequency of MCLK can be ...
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ASAHI KASEI n Audio Serial Interface Format The SDTI, SDTO, BCLK and LRCK pins are connected to an external controller. The audio data format has four modes, MSB-first and 2’s compliment. The data format is set by the DIF1-0 bits. ...
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ASAHI KASEI LRCK BCLK(32fs) SDTO( SDTI( BCLK(64fs) SDTO( SDTI( 15:MSB, 0:LSB Lch Data LRCK 0 ...
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ASAHI KASEI n MIC BLOCK 1. Pre- Amp Pre-Amp includes selector, Internal MIC or External MIC Mode can be selected by INT/EXT bit. The Pre-Amp is non-inverting amplifier and internally biased to VCOM voltage with 100k (typ.). Gain (1+Rf/Ri) of ...
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ASAHI KASEI n Analog Mixing Circuit for Recording Block typ.20k Ri - BEEP1 + 6.2k BEEP1Amp LIN1 (RIN1) 6.2k 6.2k LIN2 (RIN2) 6.2k Figure 13. Analog Mixing Circuit for Recording Block 1. BEEP1 Input When BEEP1 bit is “1”, the ...
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ASAHI KASEI 5. Polarity Input signals from INTL/INTR, EXTL/EXTR and BEEP1 pins are inverted and are output from ADC. Input signals from LIN1/RIN1 and LIN2/RIN2 pins are non-inverted and output from ADC. 6. MONO Mode When MONO bit is “1”, ...
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ASAHI KASEI n Output Digital Volume (OATT) Attenuation range of the output digital volume is 0dB to -65.25dB with MUTE, and the step width is 0.75dB. When ZEC bit is “1”, the attenuation level is changed by zero crossing detection ...
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Headphone-Amps The Power supply voltage for Headphone-Amp is supplied from HVDD pin and centered around HVCM voltage. The load resistance and output voltage are specified by HVDD voltage. The output voltage can be changed by supplying AVDD voltage and ...
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Headphone-Amps are powered-up/down by HPP bit. When HPP bit is “0”, Headphone-Amps are powered-down and HPL and HPR pins are fixed to “L” (AVSS). At power-up/down, the common voltage of HPL/HPR pin is settled by a constant which determined by ...
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ASAHI KASEI Headphone-Amps of the AK4564 has a possibility of oscillation depending on headphone characteristics. Therefore, Headphone-amp oscillation prevention circuit may be needed. Headphone-Amps oscillation prevention circuit example is shown in Figure 18. HP-Amp - + Figure 18. Headphone-Amp oscillation ...
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SPEAKER BLOCK The output signal from DAC is converted into a mono signal, [(L+R)/2], and is supplied to Speaker-Amp via ALC2 circuit. This Speaker-Amp has a monaural output by BTL, which can be output up to 80mW at 8 ...
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ASAHI KASEI -4.5dBV FS OATT = 0dB -16.5dBV FS-12dB OATT = -8.25dB OATT+DAC Figure 19. Speaker-Amp Output Level Diagram (AVDD=2.8V, OATT= -8.25dB & 0dB) *FS = Full Scale BEEP2S bit From BEEP2 ALCS bit From ALC2 Figure 20. Speaker-Amp Internal ...
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ASAHI KASEI n Digital EQ/HPF/LPF Circuits The AK4564 performs equalizing, filtering and ALC (Automatic Level Control) by digital domain for A/D converter data. The equalizing circuit emphasizes stereo separation when using internal microphone. LPF1, LPF2 and HPF2 are IIR st ...
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ASAHI KASEI n ALC1 Operation 1. ALC1 Limiter Operation When the ALC1 limiter is enabled and either Lch or Rch exceed the ALC1 limiter detection level (LMTH1-0), the IVOL value is attenuated by the amount defined in the ALC1 limiter ...
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ASAHI KASEI The following registers should not be changed during the ALC1 operation. WTM1-0, ZTM1-0, LMTH1-0, LMAT1-0, RGAIN1-0, REF7- (Power Management Control & Signal Select registers) WR (LMAT1-0, RGAIN1-0, LMTH1-0) No Finish ALC1 mode and return to manual ...
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ASAHI KASEI n FADEIN Mode In FADEIN Mode, the IVOL value increase gradually by the step set by FDATT1-0 bits when FDIN bit changes from “0” to “1”. The FADEIN period is set by FSTM, REF7-0, FDATT1-0 and FDTM1-0 bits. ...
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ASAHI KASEI n FADEOUT Mode In FADEOUT mode, the present IVOL value decreases gradually down to the MUTE state when FDOUT bit changes from “0” to “1”. The operation is done by the zero crossing detection. If the large signal ...
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ASAHI KASEI n Control Register WRITE Timing The data on the 3 wires serial interface consists of op-code (3bit), address (MSB-first, 5bit) and control data (MSB-first, 8bit). The transmitting data is output to each bit by “ ” of CCLK, ...
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ASAHI KASEI n Register Map The following registers are reset at PDN pin = “L”. Addr Register Name 00H Signal Select 1 01H Signal Select 2 SPPS 02H Power Management Control AOUTP2 AOUTP1 03H Mode Control VOL2-1 VOL2-0 VOL1-1 VOL1-0 ...
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ASAHI KASEI Signal Select 2 Addr Register Name 01H Signal Select 2 SPPS Default HPDAC: Enable input signal from Headphone-Amp to DAC output 0: OFF (Default MOUT: Enable mono output [Mixing = (L+R)/2]. 0: OFF (Default ...
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ASAHI KASEI Power Management Control Addr Register Name 02H Power Management Control AOUT2P AOUT1P Default MIC: MIC Block (Pre-Amp and MPWR) Power Control. 0: OFF 1: ON (Default) When MIC bit = “0”, Output of Pre-Amp is Hi-Z and MPWR ...
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ASAHI KASEI MIC MPWR D0:MIC HP D4:HPP SPK D5:SPKP *1: BEEP2 is enabled by controlling SPKP or HPP bit. *2: MIX1-Amp is enabled by controlling ADC or DACMIX bit MIC MPWR MVDD HP HVDD MOUT SPK AVDD SVDD Figure 27. ...
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ASAHI KASEI Mode Control Addr Register Name 03H Mode Control VOL2-1 VOL2-0 VOL1-1 VOL1-0 Default DEM1-0: Select De-emphasis Frequency The AK4564 includes the digital de-emphasis filter (tc = 50/ IIR filter. The filter corresponds to three sampling frequencies ...
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ASAHI KASEI Filter Select 1 Addr Register Name 04H Filter Select 1 MIX1 Default FSF: Select sampling rate to match a coefficient of digital filter 48kHz (Default 32kHz HPF1: Select cut-off frequency of HPF1 ...
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ASAHI KASEI Filter Select 2 Addr Register Name 05H Filter Select 2 Default LPF1: Select cut-off frequency of LPF1 to revise frequency response. This is 1 LPF2: Select cut-off frequency of LPF2 to revise frequency response. This is 1 LPF2D: ...
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ASAHI KASEI Timer Select Addr Register Name Timer Select TM1 06H Default WTM1-0: ALC1 Recovery Waiting Period A period of recovery operation when any limiter operation does not occur during ALC1 operation. WTM1 Table 14. ALC1 Recovery Operation Waiting Period ...
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ASAHI KASEI ALC Mode Control 1 Addr Register Name 07H ALC Mode Control 1 Default LMAT1-0: ALC1 Limiter ATT Step The IVOL value is attenuated when the input signal exceeds the ALC1 limiter detection level. The number of step to ...
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ALC Mode Control 2 Addr Register Name 08H ALC Mode Control 2 Default LMTH1-0: ALC1 Limiter Detection Level / Recovery Counter Reset Level LMTH1 LMTH0 ALC1 Limier Detection Level ALC1 Recovery Waiting Counter Reset Level 0 0 ALC1 Output -2.5dBFS ...
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ALC Mode Control 3 Addr Register Name 09H ALC Mode Control 3 Default REF7-0: Reference value at ALC1 Recovery Operation. 0.375dB step, 242 Levels During the ALC1 recovery operation, if the REF value exceeds the setting reference value by Gain ...
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ASAHI KASEI Input Digital ATT Control Addr Register Name 0AH IVOL7 Input Digital Volume Control Default IVOL7-0: Input Digital Volume; 0.375dB step, 242 Level When the ALC1 operation is OFF, IVOL can be used as volume. When the IVOL is ...
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Operation Mode Addr Register Name 0BH Operation Mode Default ALC1: ALC1 Enable Flag 0: Disable (Default) 1: Enable FDOUT: FADEOUT Enable Flag 0: Disable (Default) 1: Enable FDIN: FADEIN Enable Flag 0: Disable (Default) 1: Enable ALC2: ALC2 Enable Flag ...
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ASAHI KASEI Output Digital ATT Control Addr Register Name 0CH ZCE Output Digital ATT Control Default ZCE: OATT Zero Crossing Enable Flag 0: Disable 1: Enable (Default) OATT6-0: Output Digital Volume; 89 Level, 0dB ~ -65.25dB & Mute, 0.75dB step ...
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ASAHI KASEI Figure 28 shows the system connection diagram. An evaluation board (AKD4564) is available which demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. C1: 0 C3: 0. Speaker 2 ...
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ASAHI KASEI 48pin LQFP(Unit:mm) 9.0 7 0.5 0.22 0.10 n Package & Lead frame material Package molding compound: Epoxy Lead frame material: Lead frame surface treatment: Solder plate (Pb free) MS0140-E-01 PACKAGE 0 ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. MS0140-E-01 MARKING AK4564VQ XXXXXXX XXXXXXXX: Date code identifier IMPORTANT NOTICE ...