AT32UC3A0128 Atmel Corporation, AT32UC3A0128 Datasheet - Page 86

• Manufacturer Part Number: AT32UC3A0128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A0128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 109
• Ext Interrupts: 109
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32058KS–AVR32–01/12
15.5.4
15.5.5
USB
Processor and Architecture
1.
2. USBFSM and UHADDR1/2/3 registers are not available.
1. Incorrect Processor ID
2. Bus error should be masked in Debug mode
3. Read Modify Write (RMW) instructions on data outside the internal RAM does not
4.
5.
Place two NOPs instructions after each SSRF or MTSR instruction setting IxM or GM in SR.
In host mode, in case of an unexpected device disconnection whereas a usb reset is being
sent by the usb controller, the UHCON.RESET bit may not been cleared by the hardware at
the end of the reset.
Fix/Workaround
A software workaround consists in testing (by polling or interrupt) the disconnection
(UHINT.DDISCI == 1) while waiting for the end of reset (UHCON.RESET == 0) to avoid
being stuck.
Do not use USBFSM register.
Fix/Workaround
Do not use USBFSM register and use HCON[6:0] field instead for all the pipes.
The processor ID reads 0x01 and not 0x02 as it should.
Fix/Workaround
None.
If a bus error occurs during debug mode, the processor will not respond to debug com-
mands through the DINST register.
Fix/Workaround
A reset of the device will make the CPU respond to debug commands again.
work.
Read Modify Write (RMW) instructions on data outside the internal RAM does not work.
Fix/Workaround
Do not perform RMW instructions on data outside the internal RAM.
even though the part has less flash.
Fix/Workaround
The flash address space is wrapping, so it is possible to use the CRC value by calculating
CRC of the flash content concatenated with itself N times. Where N is 512 kB/flash size.
The instructions following in the pipeline the instruction masking the interrupt through SR
may behave abnormally.
Fix/Workaround
USB No end of host reset signaled upon disconnection
Need two NOPs instruction after instructions masking interrupts
CRC calculation of a locked device will calculate CRC for 512 kB of flash memory,
AT32UC3A
86