AT89S4051 Atmel Corporation, AT89S4051 Datasheet - Page 23

• Manufacturer Part Number: AT89S4051
• Manufacturer: Atmel Corporation

Specifications of AT89S4051

• Flash (kbytes): 4 Kbytes
• Max. Operating Frequency: 24 MHz
• Cpu: 8051-12C
• Max I/o Pins: 15
• Uart: 1
• Sram (kbytes): 0.25
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 2
• Isp: SPI

24. Chip Erase
25. Load X-Address
3390E–MICRO–6/08
Function:
Usage:
Note:
Figure 24-1. Chip Erase Sequence
Function:
Usage:
Figure 25-1. Load X-Address Sequence
1. FFH programmed to every address location.
2. FFH programmed to User Signature Row if User Row Fuse bit is enabled.
3. Lockbit1 and Lockbit2 programmed to “unlock” state.
1. Apply “0001” TestCode to P3.7, P3.5, P3.4, P3.3.
2. Pulse P3.2 low for 1 µs.
3. Wait 4 ms, monitor P3.1, or poll data.
1. Loads the X-Address register with data on Port P1. The loaded address will select the
2. Resets the Y-Address counter to 00H. The Y-Address is equivalent to bits [4:0] of the
1. Apply “1101” TestCode to P3.7, P3.5, P3.4, P3.3.
2. Drive Port P1 with 8-bit X-address data.
3. Pulse XTAL1 high for at least 100 ns. The address is latched on the falling edge of
page for subsequent write/read commands. The X-Address is equivalent to bits [11:5]
of the full byte address.
full byte address and selects a byte within a page.
XTAL1.
This and the following waveforms are not to scale.
P1.0 - P1.7
P3.3 - P3.7
RDY/BSY
P3.3 - P3.7
P1.0 - P1.7
RDY/BSY
XTAL1
P3.2
XTAL1
P3.2
High Z
High Z
0001
XADDR
1101
AT89S2051/S4051
High Z
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