ATmega640 Atmel Corporation, ATmega640 Datasheet - Page 187

• Manufacturer Part Number: ATmega640
• Manufacturer: Atmel Corporation

Specifications of ATmega640

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 86
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 16
• Input Capture Channels: 4
• Pwm Channels: 15
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.10 Register Description
20.10.1
2549N–AVR–05/11
TCCR2A –Timer/Counter Control Register A
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 20-2.
Table 20-3
mode.
Table 20-3.
Note:
Table 20-4 on page 188
to phase correct PWM mode.
Bit
(0xB0)
Read/Write
Initial Value
COM2A1
COM2A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 178
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A1
R/W
COM2A0
COM2A0
7
0
for more details.
0
1
0
1
0
1
0
1
Table 20-2
COM2A0
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set
R/W
6
0
ATmega640/1280/1281/2560/2561
shows the COM2A1:0 bit functionality when the WGM22:0 bits
COM2B1
R/W
WGM22 = 0: Normal Port Operation, OC2A Disconnected
5
0
Clear OC2A on Compare Match, set OC2A at BOTTOM
Set OC2A on Compare Match, clear OC2A at BOTTOM
WGM22 = 1: Toggle OC2A on Compare Match
Normal port operation, OC2A disconnected
Normal port operation, OC2A disconnected
COM2B0
R/W
4
0
Toggle OC2A on Compare Match
Clear OC2A on Compare Match
Set OC2A on Compare Match
(non-inverting mode)
(inverting mode)
R
3
–
0
(1)
Description
Description
R
2
0
–
WGM21
R/W
1
0
“Fast PWM Mode” on
WGM20
R/W
0
0
TCCR2A
187