ATmega644PR231 Atmel Corporation, ATmega644PR231 Datasheet - Page 134

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ATmega644PR231

Manufacturer Part Number
ATmega644PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega644PR231

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
8111C–MCU Wireless–09/09
Bit
+0x83
Read/Write
Reset Value
AES_REQUEST
7
W
0
Table 11-3.
• Bit [6:1] -Reserved
• Bit 0 - AES_DONE
Table 11-4.
Register 0x83 (AES_CTRL):
This register controls the operation of the security module. Do not access this register during
AES operation to read the AES core status. A read or write access during AES operation stops
the actual processing.
To read the AES status use register bit AES_DONE (register 0x82, AES_STATUS).
• Bit 7 - AES_REQUEST
A write access with AES_REQUEST = 1 initiates the AES operation.
Table 11-5.
• Bit [6:4] - AES_MODE
This register bit sets the AES operation mode.
Table 11-6.
Register Bit
AES_ER
Register Bit
AES_DONE
Register Bit
AES_REQUEST
Register Bit
AES_MODE
R/W
6
0
AES Core Operation Status
AES Core Operation Status
AES Core Status
AES Mode
AES_MODE
R/W
5
0
Value
Value
Value
Value
3 - 7
0
1
0
1
2
0
1
0
1
Description
Security module, AES core idle
Write access: Start security module
Description
ECB mode, refer to
KEY mode, refer to
CBC mode, refer to
Reserved
Description
No error of the AES module
AES module error
Description
AES Module is not finished
AES module has finished
R/W
4
0
AES_DIR
R/W
3
0
Section 11.1.3
Section 11.1.4.1
Section 11.1.4.2
2
R
0
Reserved
1
R
0
AT86RF231
0
R
0
AES_CTRL
134

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