ATmega644PR231 Atmel Corporation, ATmega644PR231 Datasheet - Page 37

• Manufacturer Part Number: ATmega644PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega644PR231

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

7.1.2.7
7.1.2.8
8111C–MCU Wireless–09/09
BUSY_TX - Transmit State
RESET State
This state can only be entered by setting pin 11 (SLP_TR) = H while the radio transceiver is in
the RX_ON state, refer to
State” on page
SLP_TR pin, see
down sequence.
Note that for CLKM clock rates 250 kHz and 62.5 kHz the master clock signal CLKM is switched
off immediately after rising edge of SLP_TR.
The reception of a frame shall be indicated to the microcontroller by an interrupt indicating the
receive status. CLKM is turned on again, and the radio transceiver enters the BUSY_RX state
(see
on page
cating the reception status. Otherwise the reception of a frame does not activate CLKM and the
microcontroller remains in its power-down mode.
After the receive transaction has been completed, the radio transceiver enters the RX_ON state.
The radio transceiver only reenters the RX_ON_NOCLK state, when the next rising edge of pin
SLP_TR pin occurs.
If the AT86RF231 is in the RX_ON_NOCLK state, and pin SLP_TR is reset to logic low, it enters
the RX_ON state, and it starts to supply clock on the CLKM pin again.
In states RX_ON_NOCLK and RX_ON, the radio transceiver current consumptions are equiva-
lent. However, the RX_ON_NOCLK current consumption is reduced by the current required for
driving pin 17 (CLKM).
Note
A transmission can only be initiated in state PLL_ON. There are two ways to start a
transmission:
Either of these causes the radio transceiver into the BUSY_TX state.
During the transition to BUSY_TX state, the PLL frequency shifts to the transmit frequency. The
actual transmission of the first data chip of the SHR starts after 16 µs to allow PLL settling and
PA ramp-up, see
tent is transmitted. In case the PHR indicates a frame length of zero, the transmission is aborted.
After the frame transmission has completed, the AT86RF231 automatically turns off the power
amplifier, generates an IRQ_3 (TRX_END) interrupt and returns into PLL_ON state.
The RESET state is used to set back the state machine and to reset all registers of the
AT86RF231 to their default values, exception are register bits CLKM_CTRL (register 0x03,
TRX_CTRL_0). These register bits require a specific treatment, for details see
“Master Clock Signal Output (CLKM)” on page
• A reset in state RX_ON_NOCLK requires further to reset pin SLP_TR to logic low, otherwise
• Rising edge of pin 11 (SLP_TR)
• TX_START command to register bits TRX_CMD (register 0x02, TRX_STATE).
the radio transceiver enters directly the SLEEP state.
Section 6.5 “Sleep/Wake-up and Transmit Signal (SLP_TR)” on page 27
28). Using this radio transceiver state it is essential to enable at least one interrupt indi-
36. Pin 17 (CLKM) is disabled 35 clock cycles after the rising edge at the
Figure 6-16 on page
Figure 7-6 on page
Section 7.1.2.5 “RX_ON and BUSY_RX - RX Listen and Receive
41. After transmission of the SHR, the Frame Buffer con-
28. This allows the microcontroller to complete its power-
117.
AT86RF231
and
Section 9.6.4
Figure 6-16
37