ATtiny13 Atmel Corporation, ATtiny13 Datasheet - Page 24

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ATtiny13

Manufacturer Part Number
ATtiny13
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny13

Flash (kbytes)
1 Kbytes
Pin Count
8
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.06
Eeprom (bytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
2
Pwm Channels
2
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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6.1.4
6.2
6.2.1
24
Clock Sources
ATtiny13
ADC Clock – clk
External Clock
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 6-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from reset, there is an additional delay allowing the power to reach a stable level before com-
mencing normal operation. The Watchdog Oscillator is used for timing this real-time part of the
start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
2.
Table 6-2.
To drive the device from an external clock source, CLKI should be driven as shown in
2. To run the device on an external clock, the CKSEL fuses must be programmed to “00”.
Figure 6-2.
Device Clocking Option
External Clock (see
Calibrated Internal 4.8/9.6 MHz Oscillator (see
Internal 128 kHz Oscillator (see
ADC
1. For all fuses “1” means unprogrammed while “0” means programmed.
Typ Time-out
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
External Clock Drive Configuration
EXTERNAL
64 ms
4 ms
page
SIGNAL
CLOCK
24)
page
26)
page
25)
CLKI
GND
Number of Cycles
8K (8,192)
512
CKSEL1:0
01, 10
00
11
(1)
2535J–AVR–08/10
Figure 6-
Table 6-

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