ATxmega64A3U Atmel Corporation, ATxmega64A3U Datasheet - Page 166

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ATxmega64A3U

Manufacturer Part Number
ATxmega64A3U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A3U

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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14.3
8331A–AVR–07/11
Block Diagram
“compare channels.” When used for capture operations, the CC channels are referred to as
“capture channels.”
Figure 14-2 on page 166
extensions.
Figure 14-2. Timer/counter block diagram.
The counter register (CNT), period registers with buffer (PER and PERBUF), and compare and
capture registers with buffers (CCx and CCxBUF) are 16-bit registers. All buffer register have a
buffer valid (BV) flag that indicates when the buffer contains a new value.
During normal operation, the counter value is continuously compared to zero and the period
(PER) value to determine whether the counter has reached TOP or BOTTOM.
The counter value is also compared to the CCx registers. These comparisons can be used to
generate interrupt requests, request DMA transactions or generate events for the event system.
Bus Bridge
Base Counter
Compare/Capture
(x = {A,B,C,D})
Counter
B
B
PERBUF
CCxBUF
shows a detailed block diagram of the timer/counter without the
PER
CNT
CCx
=
I/O Data Bus (8-bit)
= 0
=
Clock Select
Event Select
Atmel AVR XMEGA AU
CKSEL
EVSEL
"count"
"clear"
"load"
"direction"
"capture"
"match"
TOP
BOTTOM
Control Logic
Control Logic
Generation
Waveform
OVF/UNF
(INT/DMA Req.)
ERRIF
(INT Req.)
OCx Out
CCxIF
(INT/DMA
Req.)
166

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