TDA7449 STMicroelectronics, TDA7449 Datasheet
TDA7449
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TDA7449 Summary of contents
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... TWO INDEPENDENT SPEAKER CONTROL IN 1.0dB STEPS FOR BALANCE FACILITY – INDEPENDENT MUTE FUNCTION ALL FUNCTION ARE PROGRAMMABLE VIA SERIAL BUS 2 DESCRIPTION The TDA7449 is a volume tone (bass and treble) balance (Left/Right) processor for quality audio Figure 2. Block Diagram 8 L-IN1 100K 9 ...
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... TDA7449 Table 2. Absolute Maximum Ratings Symbol V Operating Supply Voltage S T Operating Ambient Temperature amb T Storage Temperature Range stg Figure 3. Pin Connection MUXOUT(L) Table 3. Thermal Data Symbol R Thermal Resistance Junction- pins th j-pin Table 4. Quick Reference Data Symbol V Supply Voltage S V Max Input Signal Handling ...
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... THD = 0.3% The selected input is grounded through a 2.2 capacitor -24dB -24 to -47dB -24dB -24 to -47dB V adjacent attenuation steps from 0dB to A max V Max. Boost/cut +12.0 18.75 Max. Boost/cut +13.0 TDA7449 = 9V 10K , R = 600 , L G Typ. Max. Unit 100 K 2 2.5 Vrms 80 ...
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... TDA7449 Table 5. Electrical Characteristcs (continued) SPEAKER ATTENUATORS C Control Range RANGE S Step Resolution STEP E Attenuation Set Error Step DC A Mute Attenuation mute AUDIO OUTPUTS V Clipping Level CLIP R Output Load Resistance L R Output Impedance Voltage Level DC GENERAL E Output Noise NO E Total Tracking Error ...
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... C8 BOUT(L) OUT_R 14 OUT_L R B OUT_L 5 LOUT OUT_ R SPKR ATT LEFT +9 V JP1 JUMPER 18 DIG_GND 19 SCL 20 SDA 4 SPKR ATT RIGHT ROUT V REF C13 100nF SUPPLY 2 AGND +V8 S GND 13 1 +9V CREF C6 330nF C11 D98AU849A TDA7449 J10 3 4 CON4 CON4 C12 CON2 5/19 ...
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... The first and the last stages are volume control blocks. The control range -47dB (mute) for the first one -79dB (mute) for the last one. Both of them have 1dB step resolution. The very high resolution allows the implementation of systems free from any noisy acoustical effect. The TDA7449 audioprocessor provides 2 bands tones control. ...
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... Figure 7. THD vs. frequency Figure 8. THD vs. RLOAD Figure 9. Channel separation vs. frequency Figure 10. Bass response Figure 11. Treble response TDA7449 7/19 ...
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... TDA7449 BUS INTERFACE Data transmission from microprocessor to the TDA7449 and vice versa takes place through the 2 wires BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). 4.1 Data Validity As shown in fig. 12, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW ...
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... ACK = Acknowledge S = Start P = Stop A = Address B = Auto Increment 6 EXAMPLES 6.1 No Incremental Bus The TDA7449 receives a start condition, the correct chip address, a subaddress with the (no incre- mental bus), N-data (all these data concern the subaddress selected), a stop condition. Figure 16. CHIP ADDRESS MSB LSB S 1 ...
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... TDA7449 6.2 Incremental Bus The TDA7449 receive a start conditions, the correct chip address, a subaddress with the incremental bus): now loop condition with an autoincrease of the subaddress whereas SUBADDRESS from "XXX1000" to "XXX1111" of DATA are ignored. The DATA 1 concern the subaddress sent, and the DATA 2 concern the subaddress sent plus one in the loop etc, and at the end it receivers the stop condition ...
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... IN1 LSB INPUT GAIN D1 D0 2dB STEPS 0 0 0dB 0 1 2dB 1 0 4dB 1 1 6dB 0 0 8dB 0 1 10dB 1 0 12dB 1 1 14dB 0 0 16dB 0 1 18dB 1 0 20dB 1 1 22dB 0 0 24dB 0 1 26dB 1 0 28dB 1 1 30dB TDA7449 11/19 ...
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... TDA7449 Table 10. VOLUME SELECTION MSB VOLUME = 0 to 47dB/MUTE Table 11. BASS SELECTION MSB 12/ LSB VOLUME D1 D0 1dB STEPS 0 0 0dB 0 1 -1dB 1 0 -2dB 1 1 -3dB 0 0 -4dB 0 1 -5dB 1 0 -6dB 1 1 -7dB 0dB -8dB -16dB -24dB -32dB -40dB X X MUTE ...
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... TDA7449 LSB TREBLE D1 D0 2dB STEPS 0 0 -14dB 0 1 -12dB 1 0 -10dB 1 1 -8dB 0 0 -6dB 0 1 -4dB 1 0 -2dB 1 1 0dB 1 1 0dB 1 0 2dB 0 1 4dB 0 0 6dB 1 1 8dB 1 0 10dB 0 1 12dB 0 0 14dB LSB SPEAKER ATTENUATION ...
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... TDA7449 Figure 18. PIN : CREF Figure 19. PINS ROUT LOUT 20 A D96AU434 Figure 20. PINS 100K V REF 14/19 Figure 21. PINS: 10, 11 20K MUXOUT 20K D96AU430 Figure 22. PINS: 12, 15 Figure 23. PINS: 13, 14 D96AU425 GND D96AU491 V S 25K BIN(L) BIN( 44K BOUT(L) BOUT( D98AU850 D96AU429 ...
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... Figure 24. PINS: 16 TREBLE(L) TREBLE(R) 50K Figure 25. PIN: 19 SCL Figure 26. PIN D96AU433 20 A D96AU424 SDA D96AU423 TDA7449 20 A 15/19 ...
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... TDA7449 Figure 27. DIP20 Mechanical Data & Package Dimensions mm DIM. MIN. TYP. MAX. a1 0.254 B 1.39 1.65 b 0.45 b1 0.25 D 25.4 E 8.5 e 2.54 e3 22.86 F 7.1 I 3.93 L 3.3 Z 1.34 16/19 inch MIN. TYP. MAX. 0.010 0.055 0.065 0.018 0.010 1.000 0.335 0.100 0.900 0.280 0.155 ...
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... Mold flash, protusions or gate burrs shall not exceed 0.15mm per side. inch MIN. TYP. MAX. 0.093 0.104 0.004 0.012 0.013 0.200 0.009 0.013 0.496 0.512 0.291 0.299 0.050 0.394 0.419 0.010 0.030 0.016 0.050 0.004 TDA7449 OUTLINE AND MECHANICAL DATA SO20 0016022 D 17/19 ...
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... TDA7449 Table 14. Revision History Date Revision March 2004 June 2004 18/19 3 Third Issue 4 Modified the style-sheet in compliance with the last revision of the “Corporate Technical Pubblications Design Guide”. Description of Changes ...
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