TDA8596 NXP Semiconductors, TDA8596 Datasheet

The TDA8596 is a quad Bridge Tied Load (BTL) audio power amplifier with symmetricalinputs, made in BCDMOS technology

TDA8596

Manufacturer Part Number
TDA8596
Description
The TDA8596 is a quad Bridge Tied Load (BTL) audio power amplifier with symmetricalinputs, made in BCDMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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TDA8596TH
Manufacturer:
NXP/恩智浦
Quantity:
20 000
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TDA8596TH/N1S
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1. General description
2. Features
2.1 General
2.2 I
The TDA8596 is a quad Bridge Tied Load (BTL) audio power amplifier with symmetrical
inputs, made in BCDMOS technology. It contains four independent amplifier channels in
BTL configuration with complementary (PMOST/NMOST) output stages. Temperature
warning and output signal clipping diagnosis is possible via the I
diagnostic pins (DIAG and STB pin). The temperature pre-warning level and clip detection
levels can be programmed via the I
output offset, load connected or not, short circuit condition at the output pins) can be read
out separately.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
C-bus mode
TDA8596
I
inputs
Rev. 02 — 8 November 2007
Operates in legacy mode (non I
Three hardware-programmable I
Drives 4
Balanced/symmetrical inputs
Speaker fault detection
Programmable gain (26 dB and 16 dB) also available in legacy mode
Independent short circuit protection per channel
Loss of ground and loss of V
supply decoupling capacitor of 2200 F)
All outputs are short-circuit proof to ground, supply voltage and across the load
All pins are short circuit proof to ground
Temperature-controlled gain reduction to prevent audio holes at high junction
temperatures
Low battery voltage detection
Qualified in accordance with AEC-Q100
DC load detection: open (no load), normal load, line-driver load
AC load (tweeter) detection
Detect which load is connected during start-up to allow the system to be configured to
select the gain accordingly (e.g. line-driver mode or normal mode).
Independently selectable soft mute of front (channel 1 and channel 3) and rear
channels (channel 2 and channel 4)
2
C-bus controlled 4
or 2
loads
P
safe (with 300 m series impedance and a maximum
45 W power amplifier with symmetrical
2
2
C-bus) and I
2
C-bus. The status of each amplifier channel (i.e.
C-bus addresses
2
C-bus mode (3.3 V and 5 V compliant)
2
C-bus and via the
Product data sheet

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TDA8596 Summary of contents

Page 1

... Rev. 02 — 8 November 2007 1. General description The TDA8596 is a quad Bridge Tied Load (BTL) audio power amplifier with symmetrical inputs, made in BCDMOS technology. It contains four independent amplifier channels in BTL configuration with complementary (PMOST/NMOST) output stages. Temperature warning and output signal clipping diagnosis is possible via the I diagnostic pins (DIAG and STB pin) ...

Page 2

... kHz normal mode; T amb normal mode; T amb line driver mode Ordering information Name Description HSOP36 plastic, heatsink small outline package; 36 leads; low stand-off height Rev. 02 — 8 November 2007 TDA8596 Min Typ 8 14.4 - 270 = 14 14 14.4 V; ...

Page 3

... SELECT DIAGNOSTIC/ CLIP DETECT 18 17 PROTECTION/ DIAGNOSTIC 4 2 PROTECTION/ DIAGNOSTIC 25 23 PROTECTION/ DIAGNOSTIC 30 32 PROTECTION/ DIAGNOSTIC PGND2 PGND3 PGND4 TDA8596 DIAG OUT3+ OUT3 OUT1+ OUT1 OUT4+ OUT4 OUT2+ OUT2 TAB 001aaf998 © NXP B.V. 2007. All rights reserved ...

Page 4

... Rev. 02 — 8 November 2007 TDA8596 1 n.c. 2 OUT1 3 PGND1 4 OUT1+ 5 n.c. 6 IN1 7 IN1+ 8 IN2 9 IN2+ 10 ...

Page 5

... P2 TAB 7. Functional description The TDA8596 is a quad BTL audio power amplifier with symmetrical inputs, made in BCDMOS technology. It contains four independent amplifier channels in BTL configuration with complementary (PMOST/NMOST) output stages (see amplifier channel (output offset, connected load, short circuit condition at output pins) can ...

Page 6

... Gain selection The gain of the TDA8596 can be programmed (line driver mode (Normal operating mode). This can be done either in I command or in legacy mode by using the GAINSEL pin. To allow this, the device must first be put in legacy mode by connecting the ADSEL pin to ground ...

Page 7

... When the STB pin is switched HIGH (> 2.5 V) the TDA8596 switches to operating condition and performs a Power-On Reset (POR). This will cause the DIAG pin to be pulled LOW. The TDA8596 will start-up when bit D0 of instruction byte IB1 is set. Bit D0 will also reset the ‘power-on reset occurred’ ...

Page 8

... W power amplifier with symmetrical inputs 2 C-bus mute settings C-bus bits (IB2[D2:D0] = 000) have been programmed to mute-off (or Rev. 02 — 8 November 2007 TDA8596 2 C-bus mode or the pin STB voltage in 2 C-bus bits have been programmed to maintain < 6 legacy mode) the amplifier ...

Page 9

... Fig 3. Start-up and shut-down timing in I TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs t d(soft_mute) 2 C-bus mode Rev. 02 — 8 November 2007 TDA8596 t off fast mute t d(fast_mute) 001aad168 © NXP B.V. 2007. All rights reserved ...

Page 10

... Fig 4. Start-up and shut-down timing with DC load active in I TDA8596_2 Product data sheet 2 I C-bus controlled 4 load t d(soft_mute) 2 Rev. 02 — 8 November 2007 45 W power amplifier with symmetrical inputs fast mute t d(fast_mute) C-bus mode TDA8596 t off 001aad169 © NXP B.V. 2007. All rights reserved ...

Page 11

... Fig 5. Start-up and shut-down timing with low pop and DC load activated TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs t d(soft_mute) Rev. 02 — 8 November 2007 TDA8596 t off fast mute t d(fast_mute) 001aad170 © NXP B.V. 2007. All rights reserved ...

Page 12

... V). An external capacitor has been connected to the SVR pin to suppress is defined as the difference between the supply voltage i. drops below the headroom protection threshold of hr Rev. 02 — 8 November 2007 TDA8596 t off fast mute t d(fast_mute) Figure 8 and 9), the content of equals half the supply O (refer to Figure 7) ...

Page 13

... V will wait for an I The TDA8596 prevents internally induced output pops during engine start. In order to prevent pops on the output caused by the application (e.g. due to the tuner supply going out of regulation), the STB pin can be pulled LOW when an engine start is detected. The STB pin will activate the fast mute within 0.1 ms and consequently all disturbances at the amplifi ...

Page 14

... I P TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs (2) V SVR t (start-Vo(off)) t (start-SVRoff) 2 C-bus modes Rev. 02 — 8 November 2007 TDA8596 output voltage (3) (3) t (s) 001aad173 © NXP B.V. 2007. All rights reserved ...

Page 15

... If the average junction temperature reaches the (I level, a thermal pre-warning will be generated, which can be read out on the I TDA8596 is programmed to send thermal warning information to the DIAG pin, the DIAG pin will be pulled LOW. The default thermal pre-warning detection level (IB3[D4 145 C typical. In case IB3[D4 the detection level is modified to 122 C typical. ...

Page 16

... Pin DIAG after power-on reset; pin DIAG will remain LOW until amplifier has been started yes can be enabled per channel Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 165 C-bus and it can also be made available on 2 ...

Page 17

... C-bus mode only O offset threshold reset: setting disabled V O offset threshold read = set bit Rev. 02 — 8 November 2007 TDA8596 …continued Legacy mode Pin STB Pin DIAG no yes; pre-warning level is 145 C no yes no yes yes 2 C-bus mode. When an ...

Page 18

... DC load bits will be set at DC load detection translation table DBx[D4 C-bus bits the microprocessor can determine after the start-up of the Rev. 02 — 8 November 2007 TDA8596 Figure 4 and LINE DRIVER MODE OPEN-CIRCUIT 20 100 800 5 k Table 5). ...

Page 19

... C-bus, the microcontroller will still be able to read out what kind of failure Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs to guarantee the detection load. Refer Load indication no AC load detected AC load detected ...

Page 20

... Ground SDA SCL Fig 14. START and STOP conditions Fig 15. Bit transfer TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs TDA8596 ADDRESS with hardware address select ...

Page 21

... Instruction bytes 2 I C-bus mode: • If R/W bit = 0, the TDA8596 expects 3 instruction bytes: IB1, IB2 and IB3 • After a power-on reset, all instruction bits are set to logic 0 Legacy mode: • The settings are equal to the condition with all instruction bits set to logic 0 (see Table Table 8 ...

Page 22

... Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 23

... D0 8.2 Data bytes 2 I C-bus mode: • the TDA8596 will send four data bytes to the microprocessor: DB1, DB2, DB3, and DB4 • All bits are latched • All bits are reset after a read operation except D4 and D5 set after a read operation, refer to the offset detection described in • ...

Page 24

... Data byte DB2 Description power-on reset occurred/amplifier status 0 = amplifi power-on reset has occurred; amplifier off speaker fault channel 4 (missing current missing current 1 = missing current Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 25

... Data byte DB3 Description maximum temperature protection protection 1 = maximum temperature protection speaker fault channel 1 (missing current missing current 1 = missing current Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 26

... short channel 1 short to ground short to ground 1 = short to ground Data byte DB4 Description reserved speaker fault channel 3 (missing current missing current 1 = missing current Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 27

... Rev. 02 — 8 November 2007 TDA8596 Min Max Unit - + ...

Page 28

... +105 C. amb Conditions load V = 0.4 V STB with rising supply voltage with falling supply voltage when headroom protection is activated; see Figure 7 Rev. 02 — 8 November 2007 TDA8596 Min [ 1 Conditions Typ normal mode; unless otherwise specified. ...

Page 29

... V < V < 8.5 V STB 2 clip detection not active; I C-bus mode legacy mode time after wake-up via STB pin before 2 first I C-bus transmission is recognized; see Figure 3 Rev. 02 — 8 November 2007 TDA8596 = 0 ; normal mode; unless otherwise specified. S Min Typ 4.1 5 ...

Page 30

... LO(SVR) pop disabled (IB2[D3] = 1); see Figure 5 IB2[D1 mV; see i Figure 6 from output signal; IB2[D1 mV; see i Figure 6 Rev. 02 — 8 November 2007 TDA8596 = 0 ; normal mode; unless otherwise specified. S Min Typ [3] 295 465 [3] 500 640 [3] 640 ...

Page 31

... V P IB2[D7:D6] = 10; level 10 % IB2[D7:D6] = 01; level 5 % IB2[D7:D6] = 00; level 2 % between IB2[D7:D6 and IB2[D7:D6 (level between 10 % and 5 %) between IB2[D7:D6 and IB2[D7:D6 (level between 5 % and 2 %) IB3[D4 IB3[D4 0. Rev. 02 — 8 November 2007 TDA8596 = 0 ; normal mode; unless otherwise specified. S Min Typ - 0 ...

Page 32

... kHz 100 kHz normal mode 0.3 V (p-p kHz to 3 kHz kHz Rev. 02 — 8 November 2007 TDA8596 = 0 ; normal mode; unless otherwise specified. S Min Typ 100 - 5000 - ...

Page 33

... S Min Typ - 25.5 26 15 20000 ) + 5.4 V, maximum = (3143 5.6 V. STB comply with 5 V and 3.3 V logic the TDA8596 Max Unit 110 V 26.5 dB 16.5 dB 100 © NXP B.V. 2007. All rights reserved ...

Page 34

... Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aad139 (1) (2) ( (W) o load 001aad140 (1) (2) ( (W) o load © NXP B.V. 2007. All rights reserved. ...

Page 35

... Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aad141 (1) ( (kHz) load 001aad142 (1) ( (kHz) load © NXP B.V. 2007. All rights reserved ...

Page 36

... Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aad143 (1) (2) ( (V) P load 001aad144 (1) (2) ( load 20 20 (V) © NXP B.V. 2007. All rights reserved. ...

Page 37

... 600 . front channel rear channel. o Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aad145 (kHz) 001aag000 (kHz © NXP B.V. 2007. All rights reserved ...

Page 38

... P L ripple 100 14 Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aag001 (Hz) 001aag002 (Hz © NXP B.V. 2007. All rights reserved ...

Page 39

... P L 100 tot 14 kHz Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 001aag003 (W) o load 001aag004 (W) o load 40 80 © NXP B.V. 2007. All rights reserved. ...

Page 40

... MUTE TDA8596 SVR SGND GAINSEL 22 F (2) resistor should first be connected to SGND before connecting to PGND. Rev. 02 — 8 November 2007 TDA8596 45 W power amplifier with symmetrical inputs 19, 20 34, 35 SELECT DIAGNOSTIC/ CLIP DETECT PROTECTION/ DIAGNOSTIC PROTECTION/ DIAGNOSTIC ...

Page 41

... Fig 30. Circuit for combined STB and clip detection function on pin STB TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs 5.6 k 4.7 k STB TDA8596 29 switch Rev. 02 — 8 November 2007 TDA8596 8 3.3 V MICRO- CONTROLLER 10 k 001aag009 © NXP B.V. 2007. All rights reserved ...

Page 42

... OUT3 17 OUT4+ 25 OUT4 gain 26 dB gain BC859 1 SDA 2 + GND 4 SCL clip TDA3664 3 4 diag TDA8596 open I 2 C-bus supply 001aag006 © NXP B.V. 2007. All rights reserved ...

Page 43

... C11 C12 C9 C10 8 x 470 nF IN1+ IN2+ +IN4 +IN3 Sgnd NXP Semiconductors C1 220 nF TDA8596TH IC1 TDA3664 TDA8596 +OUT3 J5 SCL Gnd +5V SDA SW2 26 dB gain SRK ver. 2 001aag007 001aag008 © NXP B.V. 2007. All rights reserved ...

Page 44

... Q100 - Stress test qualification for integrated circuits , and is suitable for use in automotive applications. TDA8596_2 Product data sheet 2 I C-bus controlled power amplifier with symmetrical inputs Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 45

... Rev. 02 — 8 November 2007 45 W power amplifier with symmetrical inputs detail 14.5 1.1 1.7 0.65 0.25 0.12 13.9 0.8 1.5 EUROPEAN PROJECTION TDA8596 SOT851 2.55 8 0.03 0.07 2.20 0 ISSUE DATE 04-05-04 © NXP B.V. 2007. All rights reserved ...

Page 46

... Positive-channel Metal-Oxide Semiconductor Transistor Safe Operating ARea Data sheet status Product data sheet 30: Value of base-emitter resistor changed from 5.6 k 14: Quality information reference updated Preliminary data sheet Rev. 02 — 8 November 2007 TDA8596 Change notice Supersedes - TDA8596_1 - - © NXP B.V. 2007. All rights reserved ...

Page 47

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 8 November 2007 TDA8596 © NXP B.V. 2007. All rights reserved ...

Page 48

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com TDA8596 All rights reserved. Date of release: 8 November 2007 Document identifier: TDA8596_2 ...

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