P89LPC932A1 NXP Semiconductors, P89LPC932A1 Datasheet - Page 41

• Manufacturer Part Number: P89LPC932A1
• Description: The P89LPC932A1 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC932A1_3
Product data sheet
7.28.1 General description
7.28.2 Features
7.27 Data EEPROM
7.28 Flash program memory
The P89LPC932A1 has 512 B of on-chip data EEPROM. The data EEPROM is SFR
based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can
read, write and fill the memory via SFRs and one interrupt. This data EEPROM provides
400000 minimum erase/program cycles for each byte.
After the operation finishes, the hardware will set the EEIF bit, which if enabled will
generate an interrupt. The flag is cleared by software.
The P89LPC932A1 flash memory provides in-circuit electrical erasure and programming.
The flash can be erased, read, and written as bytes. The Sector and Page Erase functions
can erase any flash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase
the entire program memory. ICP using standard commercial programmers is available. In
addition, IAP and byte-erase allows code memory to be used for non-volatile data storage.
On-chip erase and write timing generation contribute to a user-friendly programming
interface. The P89LPC932A1 flash reliably stores memory contents even after
400000 erase and program cycles. The cell is designed to optimize the erase and
programming mechanisms. The P89LPC932A1 uses V
perform the Program/Erase algorithms.
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Byte mode: In this mode, data can be read and written one byte at a time.
Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The
entire row can be erased by writing 00H.
Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector
can be erased by writing 00H.
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal fixed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Any flash program/erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the flash for each sector.
400000 typical erase/program cycles for each byte.
20 year minimum data retention.
Rev. 03 — 12 March 2007
8-bit microcontroller with accelerated two-clock 80C51 core
DD
as the supply voltage to
P89LPC932A1
© NXP B.V. 2007. All rights reserved.
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