MPT612 NXP Semiconductors, MPT612 Datasheet
MPT612
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MPT612 Summary of contents
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... The IC can be configured for boundary conditions set in software. There are flash memory available for application software. In this datasheet, solar PV terminology has been primarily used as an example. However, the MPT612 is equally useful for fuel cells or any other DC source which has MPP behavior. Product data sheet ...
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... Micro inverter per panel removes the need for one large system inverter MPT612 Product data sheet 2 C-buses (400 kbit/s) All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... MPPT functionality these blocks can be used for customer specific application All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC Version SOT313-2 STATUS INDICATION LEDs SWITCH CIRCUIT ...
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... Fig 2. Pin Configuration MPT612 Product data sheet MPT612FBD48 All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC 36 PIO11/CTS1/CAP1_1/AD4 35 PIO10/RTS1/CAP1_0/AD3 34 PVCURRENTSENSE 33 PVVOLTSENSEBOOST 32 PVVOLTSENSEBUCK 31 GNDADC 30 PIO9/RXD1/PWMOUT2 29 PIO8/TXD1/PWMOUT1 28 PWMOUT0 ...
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... RTS1: Request To Send output for UART1 I CAP1_0: capture input for timer 1, channel 0 I AD3: analog-to-digital converter input 3 All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... SSEL1: slave select for SPI1; selects the SPI interface as a slave O MAT3_0: PWM output for timer 3, channel Voltage sense for buck mode All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking © NXP B.V. 2010. All rights reserved. ...
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... ADC voltage reference level I 1.8 V core power supply; internal circuitry and on-chip PLL power supply voltage All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC [6] [6] [ ...
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... DD(ADC) ≥ 3.0 V) digital I C-bus 400 kHz specification compatible pad. It requires external DD(ADC) 2 C-bus function on that pin. All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... Thumb mode. 7.2 On-chip flash program memory The MPT612 incorporates flash memory system. This memory can be used for both code and data storage. Programming flash memory can be performed in several ways. It can be programmed in system using the serial port. The application program can also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc ...
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... NXP Semiconductors 7.4 Memory map The MPT612 memory map incorporates several distinct regions, as shown in addition, the CPU interrupt vectors can be re-mapped to allow them to reside in either flash memory (the default) or on-chip static RAM. 4.0 GB 3.75 GB 3.5 GB 3.0 GB 2.0 GB 1.0 GB 0.0 GB Fig 3. System Memory Map 7.5 Interrupt controller The VIC accepts all of the interrupt request inputs and categorizes them as FIQ, vectored IRQ and non-vectored IRQ as defined by programmable settings ...
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... Bit level set and clear registers allow a single instruction setting or clearing of any number of bits on one port • Direction control of individual bits MPT612 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... Every analog input has a dedicated result register to reduce interrupt overhead 7.9 UARTs The MPT612 contain two UARTs. In addition to standard transmit and receive data lines UART1 also provides a full modem control handshake interface. The UARTs in MPT612 include a fractional baud rate generator for both UARTs. Standard baud rates such as 115200 can be achieved with any crystal frequency above 2 MHz ...
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... C-bus can also be used for test and diagnostic purposes 7.11 SPI serial I/O controller The MPT612 contains one SPI I/O controller. SPI is a full duplex serial peripheral interface, designed to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer ...
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... NXP Semiconductors The MPT612 can count external events on one of the capture inputs, if the minimum external pulse width is equal to or longer than a period of PCLK. In this configuration, unused capture lines can be selected as regular timer capture inputs or used as external interrupts. The event counter provides the following features: • ...
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... PCLK and the ARM processor clock frequency is osc All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC × 232 × multiples of PCLK © NXP B.V. 2010. All rights reserved ...
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... PLL as a clock source. The PLL settling time is 100 µs. 7.17.3 Reset and wake-up timer The MPT612 reset has two sources; one from the RST pin and the other from the watchdog reset. The RST pin is a Schmitt trigger input pin with an additional glitch filter. Assertion of ...
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... If Code Read Protection level three (CRP3) is selected, no future factory testing can be performed on the device. 7.17.5 External interrupt inputs The MPT612 includes up to three edge or level sensitive external interrupt inputs as selectable pin functions. When the pins are combined, external events can be processed as three independent interrupt signals. Optionally, the external interrupt inputs can be used to wake-up the processor from Power-down mode and Deep power-down mode ...
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... The PLL remains active (if it was running) during Idle mode because the APB divider is connected to the PLL output. 7.17.9 Emulation and debugging The MPT612 supports emulation and debugging using the JTAG serial port. 7.17.10 EmbeddedICE Standard ARM EmbeddedICE logic provides on-chip debug support. Debugging of the target system requires a host computer running the debugger software and an EmbeddedICE protocol converter ...
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... lightweight debug monitor that runs in the background while users debug the foreground application. It communicates with the host using DCC which is present in the EmbeddedICE logic. The MPT612 contain a specific configuration of RealMonitor software programmed into the on-chip boot ROM memory. ...
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... DD(IO) ≥ DD(ADC) [7][8][9] and DD(IO) < DD(ADC) = − −4 mA − 0 DD(IO DD(ADC All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC Min Typ Max [2] 1.65 1.8 1.95 [3] [4] 2.6 3.3 3.6 [5] 2.6 3.3 3.6 [6] 2.0 3.3 3 ...
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... V DDC DD(RTC 3.0 V DDC DD(RTC °C amb = 1 3.0 V DDC DD(RTC DD(IO All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC Min Typ Max −15 −50 −85 [13] [12 2 105 - 0 ...
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... DD(ADC) . ° C unless otherwise specified. ADC frequency 4.5 MHz Conditions = 3.3 V and V = 3.3 V for 10-bit resolution at full speed; V DD(IO) Fig 4. Fig 4. Fig 4. All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC Min Typ Max ...
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... LSB (ideal) 1018 1019 (LSB ) IA ideal 1 LSB = All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC offset gain error error (1) 1020 1021 1022 1023 1024 − DDA ...
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... PCB as small as possible. The values of Cx1 and Cx2 should be chosen smaller accordingly to the increase in parasitics of the PCB layout. The MPT612 IC can be used with accompanying software only. The MPT612 software stack is designed to cater to different types of applications in the solar PV domain ranging from simple MPPT charge controller to advanced systems on street lighting applications to micro-inverters and DC-DC converters per panel ...
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... NXP Semiconductors 12. MPT612 software overview The MPT612 IC can only be used with accompanying software. The MPT612 software stack is designed to meet the needs of different solar PV domain applications ranging from MPPT charge controllers to advanced street lighting system applications. • Scalable software modules. Only those modules that are developed and tested are included in the final application image • ...
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... This module consists of two sub modules: Hardware Functional Abstraction Layer (HFAL) and MPPTCore. Both these sub modules are delivered as software libraries together with the MPT612 IC mandatory to use these modules to access the MPT612’s MPPT functionality. 12.2.1 Hardware Functional Abstraction Layer (HFAL) This module contains the functional abstraction of different peripherals that are of interest to the application layer as well as different modules of MPT612 software ...
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... Using the easy configuration for the battery parameters and well documented APIs, the user can design an application with ease. This module together with the MPT612SW will help in the creation of power management systems for battery charging for home and street lighting applications ...
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... NXP Semiconductors 13. MPT612SW interfaces 13.1 Hardware Functional Abstraction Layer interfaces Table 7. HFAL Interfaces Interface nxLibMpt_Hfal_Irq_InstallHandler nxLibMpt_Hfal_Irq_FreeHandler nxLibMpt_Hfal_Irq_Enable nxLibMpt_Hfal_Irq_Disable nxLibMpt_Hfal_Irq_SetPriority nxLibMpt_Hfal_Irq_GetPriority nxLibMpt_Hfal_Irq_SaveFlags nxLibMpt_Hfal_Irq_RestoreFlags nxLibMpt_Hfal_Schedular_RestoreFlags nxLibMpt_Hfal_Schedular_SaveFlags nxLibMpt_Hfal_Task_Create nxLibMpt_Hfal_Timer_Create nxLibMpt_Hfal_Timer_Delete nxLibMpt_Hfal_Timer_CheckTimeOut nxLibMpt_Hfal_Timer_Start nxLibMpt_Hfal_Timer_Stop nxLibMpt_Hfal_Timer_Delay nxLibMpt_Hfal_Timer_SetTimeOut nxLibMpt_Hfal_Timer_GetTimeOut nxLibMpt_Hfal_Pwm_Init nxLibMpt_Hfal_Pwm_SetDutyCycle nxLibMpt_Hfal_Pwm_GetDutyCycle nxLibMpt_Hfal_Pwm_SetCount nxLibMpt_Hfal_Pwm_GetCount nxLibMpt_Hfal_Gpio_Init nxLibMpt_Hfal_Gpio_SetValue nxLibMpt_Hfal_Gpio_GetValue nxLibMpt_Hfal_Flash_Erase ...
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... MPP tracking algorithm returns the status of MPP tracking algorithm (enabled or disabled) reads the current status of the MPPTCore module All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... PV open circuit voltage sets the PV voltage to a new voltage specified switches on the specified LED switches off the specified LED All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... 0.18 7.1 7.1 9.15 9.15 1 0.5 0.12 6.9 6.9 8.85 8.85 REFERENCES JEDEC JEITA MS-026 All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC SOT313 θ detail X (1) (1) θ 0.75 0.95 ...
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... SPI SRAM SSI SSP TTL UART VIC 16. Revision history Table 12. Revision history Document ID Release date MPT612 v.2 20100914 • Modifications: Data sheet status changed from Objective data sheet to Product data sheet. MPT612 v.1 20100615 MPT612 Product data sheet Abbreviations Description Analog-to-Digital Converter ...
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... It is neither qualified nor tested in accordance with automotive testing or application requirements. All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are property of their respective owners C-bus — trademark of NXP B.V. salesaddresses@nxp.com http://www.nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... Fig 1. Block diagram ................................................... 3 Fig 2. Pin Configuration .............................................. 4 Fig 3. System Memory Map ...................................... 10 Fig 4. ADC conversion characteristics ...................... 23 Fig 5. MPT612SW Architecture ................................. 26 Fig 6. Package outline .............................................. 31 MPT612 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © ...
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... MPPTCore Interfaces ..................................... 29 Table 9. MPPTCore Interfaces ..................................... 30 Table 10. MPPTCore Interfaces ..................................... 30 Table 11. Abbreviations .................................................. 32 Table 12. Revision history ............................................... 32 MPT612 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 14 September 2010 MPT612 Maximum power point tracking IC © NXP B.V. 2010. All rights reserved ...
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... Maximum power point tracking IC 11.1 XTAL1 input ...................................................... 24 11.1.1 XTAL and RTC Printed Circuit Board (PCB) layout guidelines ............................................... 24 12. MPT612 software overview ............................... 25 12.1 Architecture ...................................................... 26 12.2 MPT612 software modules ............................... 26 12.2.1 Hardware Functional Abstraction Layer (HFAL) ......................................................................... 26 12.2.2 MPPTCore module ........................................... 27 12.3 Lead-Acid battery charging module .................. 27 12.4 Sample charge controller and load control application ........................................................ 27 12 ...