PMDPB65UP NXP Semiconductors, PMDPB65UP Datasheet - Page 2

Dual small-signal P-channel enhancement mode Field-Effect Transistor (FET) in a small and leadless ultra thin SOT1118 Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology

PMDPB65UP

Manufacturer Part Number
PMDPB65UP
Description
Dual small-signal P-channel enhancement mode Field-Effect Transistor (FET) in a small and leadless ultra thin SOT1118 Surface-Mounted Device (SMD) plastic package using Trench MOSFET technology
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Marking
Table 4.
5. Limiting values
Table 5.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PMDPB65UP
Product data sheet
Pin
1
2
3
4
5
6
7
8
Type number
PMDPB65UP
Type number
PMDPB65UP
Symbol
Per transistor
V
V
I
I
P
D
DM
DS
GS
tot
Symbol Description
S1
G1
D2
S2
G2
D1
D1
D2
Pinning information
Ordering information
Marking codes
Limiting values
Parameter
drain-source voltage
gate-source voltage
drain current
peak drain current
total power dissipation
source 1
gate 1
drain 2
source 2
gate 2
drain 1
drain 1
drain 2
HUSON6
Package
Name
Description
plastic thermal enhanced ultra thin small outline package;
no leads; 6 terminals
All information provided in this document is subject to legal disclaimers.
Conditions
T
V
V
T
T
T
Rev. 2 — 8 March 2011
amb
amb
amb
sp
GS
GS
Simplified outline
= 25 °C
= -4.5 V; T
= -4.5 V; T
= 25 °C
= 25 °C; single pulse; t
= 25 °C
SOT1118 (HUSON6)
Transparent top view
6
1
7
Marking code
1C
amb
amb
5
2
= 25 °C
= 100 °C
8
4
3
20 V, 3.5 A dual P-channel Trench MOSFET
p
≤ 10 µs
Graphic symbol
[1]
[1]
[2]
[1]
3, 8
PMDPB65UP
2
1
Min
-
-8
-
-
-
-
-
-
© NXP B.V. 2011. All rights reserved.
017aaa062
Version
SOT1118
Max
-20
8
-3.5
-2.7
-20
520
1.25
8.3
6, 7
5
4
Unit
V
V
A
A
A
mW
W
W
2 of 15

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