PSMN2R6-40YS NXP Semiconductors, PSMN2R6-40YS Datasheet
PSMN2R6-40YS
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PSMN2R6-40YS Summary of contents
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... PSMN2R6-40YS N-channel LFPAK 40 V 2.8 mΩ standard level MOSFET Rev. 01 — 23 June 2009 1. Product profile 1.1 General description Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits ...
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... 100 °C; see j see Figure °C; see j see Figure 13 Simplified outline SOT669 (LFPAK) Rev. 01 — 23 June 2009 PSMN2R6-40YS Min Typ Max - - 3.7 Figure 12 2.8 Figure 12; Graphic symbol mbb076 Version SOT669 © NXP B.V. 2009. All rights reserved. ...
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... j(init Ω unclamped 003aad225 120 P der (%) 150 200 0 T (°C) mb Fig 2. Normalized total power dissipation as a function of mounting base temperature Rev. 01 — 23 June 2009 PSMN2R6-40YS Min Max - - 100 - 100 Figure 3 - 651 - 131 -55 175 -55 175 - 260 - ...
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... Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN2R6-40YS_1 Product data sheet N-channel LFPAK 40 V 2.8 mΩ standard level MOSFET = (1) 1 Conditions see Figure Rev. 01 — 23 June 2009 PSMN2R6-40YS 003aad322 10μ s 100μ 1ms 10ms 100ms 10 V (V) DS Min Typ Max - 0.5 1.15 ...
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... see Figure 14 see Figure MHz °C; see Figure 0.5 Ω 4.7 Ω R G(ext) Rev. 01 — 23 June 2009 PSMN2R6-40YS Min Typ Max Unit 4 µ ...
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... DS j 003aad190 6000 C 5.5 (pF) 5000 4000 5 3000 V (V) = 4.5 GS 2000 1 (V) DS Fig 6. Input and reverse transfer capacitances as a function of gate-source voltage; typical values Rev. 01 — 23 June 2009 PSMN2R6-40YS Min Typ Max Unit - 0.78 1 003aad196 C iss C rss ...
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... D (A) −2 10 −3 10 −4 10 −5 10 − 100 0 I (A) D Fig 10. Sub-threshold drain current as a function of gate-source voltage Rev. 01 — 23 June 2009 PSMN2R6-40YS 003aad198 (V) GS 03aa35 min typ max (V) GS © NXP B.V. 2009. All rights reserved ...
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... Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature 003aad191 GS(pl GS(th Fig 14. Gate charge waveform definitions 120 150 I (A) D Rev. 01 — 23 June 2009 PSMN2R6-40YS 03aa27 0 60 120 180 ( ° GS1 GS2 G(tot) 003aaa508 © ...
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... 150 ° 175 ° 0.3 0.6 0.9 Rev. 01 — 23 June 2009 PSMN2R6-40YS 003aad195 (V) DS 003aad193 = 25 °C 1.2 V (V) SD © NXP B.V. 2009. All rights reserved. iss oss rss ...
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... 2.5 scale ( (1) ( max 4.41 2.2 0.9 0.25 0.30 4.10 5.0 4.20 3.62 2.0 0.7 0.19 0.24 3.80 4.8 REFERENCES JEDEC JEITA MO-235 Rev. 01 — 23 June 2009 PSMN2R6-40YS detail ( 3.3 6.2 0.85 1.3 1.3 1.27 0.25 3.1 5.8 0.40 0.8 0.8 EUROPEAN ISSUE DATE PROJECTION 04-10-13 06-03-16 © NXP B.V. 2009. All rights reserved. ...
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... Revision history Table 7. Revision history Document ID Release date PSMN2R6-40YS_1 20090623 PSMN2R6-40YS_1 Product data sheet N-channel LFPAK 40 V 2.8 mΩ standard level MOSFET Data sheet status Change notice Product data sheet - Rev. 01 — 23 June 2009 PSMN2R6-40YS Supersedes - © NXP B.V. 2009. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 23 June 2009 PSMN2R6-40YS © NXP B.V. 2009. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 23 June 2009 Document identifier: PSMN2R6-40YS_1 ...