ISL55143IRZ-T Intersil, ISL55143IRZ-T Datasheet

IC COMP CMOS HS 18V 36-TQFN

ISL55143IRZ-T

Manufacturer Part Number
ISL55143IRZ-T
Description
IC COMP CMOS HS 18V 36-TQFN
Manufacturer
Intersil
Type
Windowr
Datasheet

Specifications of ISL55143IRZ-T

Number Of Elements
4
Voltage - Supply
10 V ~ 18 V
Mounting Type
Surface Mount
Package / Case
36-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High-Speed 18V CMOS Comparators
ISL55141, ISL55142, ISL55143 integrated circuits are
high-speed, wide input common-mode range comparators.
They provide three-state window comparators in a high
voltage CMOS process (18V). Each comparator has dual
receive thresholds, CV
minimum 1-V
devices can accept inputs from a number of logic families,
such as TTL, ECL, CMOS, LVCMOS, LVDS and CML. Two
bits of output per comparator provide the test controller with
qualification of a comparator input into three states. The two
output bits work with a separate user supply to establish
V
logic levels.
Fast propagation delay (9.5ns typical at ±50mV overdrive)
makes this family compatible with high-speed digital test
systems. The 18V range enables the comparator input to
operate over a wide input range. Two references per input
enable and three state digitalization of input with voltage
swings of up to 13V common mode. The operating
frequency of these devices is typically 65MHz.
High voltage CMOS process makes these devices ideal for
large voltage swing applications, such as special test
voltages levels associated with Flash devices or power
supervision applications and may avoid the need for test bus
isolation relay(s).
Functional Block Diagram
OH
Note: x denotes 1, 2 or 4 channels for ISL55141, ISL55142 and
ISL55143, respectively
Q
, V
Q
BX
AX
DUAL LEVEL COMPARATOR - RECEIVERS
V
V
V
OL
V
OH
OL
OL
OH
levels compatibility with the system’s controller
IH
and maximum 0-V
A
and CV
V
V
V
V
1
CC
EE
CC
EE
B
, for establishing
IL
Data Sheet
voltage levels. These
CV
CV
V
AX
BX
INPX
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2008, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
Features
• 18V I/O Range
• 65MHz Operation
• 9.5ns Typical Propagation Delay
• Programmable Input Thresholds
• User Defined Comparator OutputLlevels
• Common-Mode Range Includes Negative Rails
• Small Footprints in QFN Packages
• Power-Down Current <10µA
• Pb-Free (RoHS compliant)
Applications
• Burn in ATE
• Low Cost ATE
• Fast Supervisory Power Control
• Instrumentation
Ordering Information
NOTES:
(Notes 1, 2, 3)
ISL55141IRZ 55 141IRZ
ISL55141IVZ 55141 IVZ
ISL55142IRZ 55142 IRZ
ISL55142IVZ 55142 IVZ
ISL55143IRZ 55143 IRZ
1. Add “-T*” suffix for tape and reel. Please refer to
2. These Intersil Pb-free plastic packaged products employ special
3. For Moisture Sensitivity Level (MSL), please see device
ISL55141, ISL55142, ISL55143
NUMBER
on reel specifications.
Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish,
which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.
information page for ISL55141, ISL55142, ISL55143. For more
information on MSL please see techbrief TB363.
PART
All other trademarks mentioned are the property of their respective owners.
March 1, 2011
MARKING
PART
RANGE (°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
TEMP.
16 Ld QFN
14 Ld TSSOP M14.173
20 Ld QFN
20 Ld TSSOP M20.173
36 Ld TQFN L36.6X6
PACKAGE
(Pb-Free)
TB347
FN6230.2
L16.4X4A
L20.5x5
for details
DWG. #
PKG.

Related parts for ISL55143IRZ-T

ISL55143IRZ-T Summary of contents

Page 1

... NUMBER PART (Notes MARKING ISL55141IRZ 55 141IRZ ISL55141IVZ 55141 IVZ ISL55142IRZ 55142 IRZ ISL55142IVZ 55142 IVZ ISL55143IRZ 55143 IRZ NOTES Add “-T*” suffix for tape and reel. Please refer to on reel specifications. V INPX 2. These Intersil Pb-free plastic packaged products employ special ...

Page 2

Pinouts ISL55141 SINGLE DEVICE (16 LD 4X4 QFN) TOP VIEW ISL55142 (20 LD TSSOP) TOP VIEW ...

Page 3

Pin Descriptions PIN V Negative supply input EE Q Channel A, CV reference driven. Comparator output Channel B, CV reference driven. Comparator output Comparator output logic low supply. Unbuffered analog input that sets all ...

Page 4

... Ld TSSOP Package (Notes -0.5V +0.5V QFN Package (Notes 6, 7 TSSOP Package (Notes -0.5V +0.5V TQFN Package (Notes 6, 7 Maximum Junction Temperature (Plastic Plackage Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp SYMBOL MIN ...

Page 5

Electrical Specifications Test Conditions: V otherwise specified. (Continued) PARAMETER Input Capacitance (Note 11) DIGITAL OUTPUTS Output Resistance Output Logic High Voltage Output Logic Low Voltage POWER SUPPLIES, STATIC CONDITIONS Positive Supply DC Current/Comparator Negative Supply ...

Page 6

Test Circuits and Waveforms + 1. 5V INP 1. FIGURE 3. t RECEIVER SWITCHING TEST CIRCUIT PD Application Information The ISL55141, ISL55142, ...

Page 7

The maximum power dissipation allowed in a package is determined according to Equation JMAX AMAX -------------------------------------------- - P = Θ DMAX JA where: • Maximum junction temperature JMAX • Maximum ambient temperature ...

Page 8

... AND 2 CHANNELS ACTIVE CC 100 3200 1600 800 400 200 V SQUARE WAVE PERIOD IN ns INP FIGURE 9. ISL55142 2-CHANNEL ISL55141, ISL55142, ISL55143 Device installed on Intersil ISL55141, ISL55142, ISL55143 Evaluation Boards ISL55143 ISL55142 ISL55141 FIGURE 6. ISL55141 I 200 180 160 140 2 CHANNELS 120 100 80 1 CHANNEL ...

Page 9

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

Page 10

... Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation ...

Page 11

Package Outline Drawing M14.173 14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 3, 10/09 1 5.00 ±0.10 14 6.40 4.40 ±0. 0. 0.65 TOP VIEW H C SEATING PLANE 0.10 C SIDE VIEW ...

Page 12

... Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Features and dimensions A2, A3, D1, E1, P & θ are present when Anvil singulation method is used and not present for saw singulation. 10. Compliant to JEDEC MO-220VHHC Issue I except for the " ...

Page 13

Package Outline Drawing M20.173 20 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 2, 5/10 1 6.50 ±0.10 20 6.40 4.40 ±0. 0. TOP VIEW H C SEATING PLANE 0.10 C SIDE VIEW (5.65) ...

Page 14

Package Outline Drawing L36.6x6 36 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 08/08 6.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 5. 4.15) Exp. Dap 4.15) Exp. Dap. ( ...

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