STM32F101V8 STMicroelectronics, STM32F101V8 Datasheet - Page 57

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STM32F101V8

Manufacturer Part Number
STM32F101V8
Description
Mainstream Access line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 36 MHZ CPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F101V8

Peripherals Supported
timers, ADC, SPIs, I2Cs and USARTs
Conversion Range
0 to 3.6 V
Systick Timer
24-bit downcounter

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STM32F101x8, STM32F101xB
Output driving current
The GPIOs (general-purpose inputs/outputs) can sink or source up to ±8 mA, and sink or
source up to ±20 mA (with a relaxed V
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
Output voltage levels
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 35.
1. The I
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
4. Based on characterization data, not tested in production.
Symbol
V
V
V
V
V
V
V
V
Table
OH
OH
OH
OH
OL
OL
OL
OL
and the sum of I
Table 6
The sum of the currents sourced by all the I/Os on V
consumption of the MCU sourced on V
I
The sum of the currents sunk by all the I/Os on V
consumption of the MCU sunk on V
I
(1)
(1)
(1)
(1)
VDD
VSS
(3)
(3)
(3)
(3)
IO
IO
8. All I/Os are CMOS and TTL compliant.
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
(see
and the sum of I
(see
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output voltage characteristics
Table
Table
IO
(I/O ports and control pins) must not exceed I
6).
6).
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 13586 Rev 14
OL
SS
/V
OH
DD,
cannot exceed the absolute maximum rating
).
cannot exceed the absolute maximum rating
DD
2.7 V < V
2.7 V < V
2.7 V < V
Section
2 V < V
CMOS port
I
IO
I
supply voltage conditions summarized
Table 35
IO
I
Conditions
I
IO
TTL port
IO
SS
= +20 mA
= +6 mA
VSS
= +8 mA,
= +8 mA
DD
plus the maximum Run
DD,
DD
DD
DD
.
5.2:
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
plus the maximum Run
(2)
VDD
are derived from tests
(2)
(4)
(4)
,,
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 6
Unit
57/87
V
V
V
V

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