STM32L151C6 STMicroelectronics, STM32L151C6 Datasheet - Page 15

• Manufacturer Part Number: STM32L151C6
• Description: Ultra-low-power ARM Cortex-M3 MCU with 32 Kbytes Flash, 32 MHz CPU, LCD, USB
• Manufacturer: STMicroelectronics

Specifications of STM32L151C6

• Operating Power Supply Range: 1.65 V to 3.6 V (without BOR) or 1.8 V to 3.6 V (with BOR option)
• Temperature Range: –40 to 85 °C
• 4 Modes: Sleep, Low-power run (9 μA at 32 kHz), Low-power sleep (4.4 μA),Stop with RTC (1.45 μA), Stop (570 nA), Standby (300 nA)
• Ultralow Leakage Per I/o: 50 nA
• Fast Wakeup From Stop: 8 μs
• Core: ARM 32-bit Cortex™-M3 CPU
• Dma: 7-channel DMA controller, supporting timers, ADC, SPIs, I2Cs and USARTs

STM32L151xx, STM32L152xx
3.3
3.3.1
3.3.2
Note:
3.3.3
Reset and supply management
Power supply schemes
●
●
Power supply supervisor
The device has an integrated ZEROPOWER power-on reset (POR)/power-down reset
(PDR) that can be coupled with a brownout reset (BOR) circuitry.
For devices operating between 1.8 and 3.6 V, the BOR is always active at power-on and
ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold is reached, the
option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently (in which case, the V
BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To reduce the
power consumption in Stop mode, it is possible to automatically switch off the internal
reference voltage (V
below a specified threshold, V
circuit.
For devices operating between 1.65 V and 3.6 V, the BOR is permanently disabled.
Consequently, the start-up time at power-on can be decreased down to 1ms typically.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
V
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
●
●
●
DD
DD
/V
/V
V
Provided externally through V
V
and PLL (minimum voltage to be applied to V
V
MR is used in Run mode (nominal regulation)
LPR is used in the Low-power run, Low-power sleep and Stop modes
Power down is used in Standby mode. The regulator output is high impedance, the
kernel circuitry is powered down, inducing zero consumption but the contents of the
registers and RAM are lost are lost except for the standby circuitry (wakeup logic,
IWDG, RTC, LSI, LSE crystal 32K osc, RCC_CSR).
DD
SSA
DDA
DDA
DDA
= 1.65 to 3.6 V: external power supply for I/Os and the internal regulator.
, V
power supply and compares it to the V
is higher than the V
and V
DDA
SSA
= 1.65 to 3.6 V: external analog power supplies for ADC, reset blocks, RCs
REFINT
must be connected to V
) in Stop mode. The device remains in reset mode when V
PVD
POR/PDR
Doc ID 17659 Rev 6
threshold. The interrupt service routine can then generate
DD
DD
/V
pins.
or V
DDA
BOR
drops below the V
DD
, without the need for any external reset
DD
and V
PVD
DDA
min value at power down is 1.65 V). Five
SS
threshold. This PVD offers 7 different
is 1.8 V when the ADC is used).
, respectively.
PVD
threshold and/or when
Functional overview
DD
15/109
is