STM32W108C8 STMicroelectronics, STM32W108C8 Datasheet - Page 9

• Manufacturer Part Number: STM32W108C8
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with 64-Kybte Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108C8

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch and breakpoint; data watchpoint and trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

STM32W108C8
13
14
12.2
12.3
Debug support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
13.1
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
14.1
14.2
14.3
14.4
14.5
Clock frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
12.1.1
12.1.2
Event manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Nested vectored interrupt controller (NVIC) interrupts . . . . . . . . . . . . . . 181
12.3.1
12.3.2
12.3.3
12.3.4
12.3.5
12.3.6
12.3.7
STM32W108 JTAG TAP connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189
Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
14.1.1
14.1.2
14.1.3
14.1.4
14.1.5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
14.3.1
14.3.2
14.3.3
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
14.5.1
14.5.2
14.5.3
14.5.4
Non-maskable interrupt (NMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
Top-level set interrupts configuration register (INT_CFGSET) . . . . . . 181
Top-level clear interrupts configuration register (INT_CFGCLR) . . . . . 182
Top-level set interrupts pending register (INT_PENDSET) . . . . . . . . . 183
Top-level clear interrupts pending register (INT_PENDCLR) . . . . . . . . 184
Top-level active interrupts register (INT_ACTIVE) . . . . . . . . . . . . . . . . 185
Top-level missed interrupts register (INT_MISS) . . . . . . . . . . . . . . . . . 186
Auxiliary fault status register (SCS_AFSR) . . . . . . . . . . . . . . . . . . . . . 187
Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Operating conditions at power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
Power-on resets (POR HV and POR LV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192
NRST pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193
Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 193
Electrostatic discharge (ESD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193
Static latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .194
High frequency internal clock characteristics . . . . . . . . . . . . . . . . . . . . 199
High frequency external clock characteristics . . . . . . . . . . . . . . . . . . . 199
Low frequency internal clock characteristics . . . . . . . . . . . . . . . . . . . . 199
Low frequency external clock characteristics . . . . . . . . . . . . . . . . . . . . 200
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