STM32W108HB STMicroelectronics, STM32W108HB Datasheet - Page 29

• Manufacturer Part Number: STM32W108HB
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108HB

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
4.1
4.2
Flash memory
The STM32W108 provides Flash memory in four separate blocks as follows:
●
●
●
●
The size of these blocks and associated page size is described in
Table 3.
The smallest erasable unit is one page and the smallest writable unit is an aligned 16-bit
half-word. The flash is guaranteed to have 10k write/erase cycles. The flash cell has been
qualified for a data retention time of >100 years at room temperature.
Flash may be programmed either through the Serial Wire/JTAG interface or through
bootloader software. Programming flash through Serial Wire/JTAG requires the assistance
of RAM-based utility code. Programming through a bootloader requires specific software for
over-the-air loading or serial link loading. A simplified, serial-link-only bootloader is also
available preprogrammed into the FIB.
Random-access memory
The STM32W108 has 8/12/16 Kbytes of static RAM on-chip. The start of RAM is mapped to
address 0x20000000. Although the ARM® Cortex-M3 allows bit band accesses to this
address region, the standard MPU configuration does not permit use of the bit-band feature.
The RAM is physically connected to the AHB System bus and is therefore accessible to both
the ARM® Cortex-M3 microprocessor and the debugger. The RAM can be accessed for
both instruction and data fetches as bytes, half words, or words. The standard MPU
configuration does not permit execution from the RAM, but for special purposes, such as
programming the main flash block, the MPU may be disabled. To the bus, the RAM appears
as 32-bit wide memory and in most situations has zero wait state read or write access. In
the higher CPU clock mode the RAM requires two wait states. This is handled by hardware
transparent to the user application with no configuration required.
FIB-EXT
Total
MFB
CIB
FIB
Main Flash Block (MFB)
Fixed Information Block (FIB)
Fixed Information Block Extension (FIB-EXT)
Customer Information Block (CIB)
Flash memory
130.5
Size
128
STM32W108xB
0.5
2
0
Page size
N/A
0.5
1
2
Doc ID 16252 Rev 13
Size
STM32W108CC
256
276
16
2
2
Page size
2
2
2
2
Size
192
212
STM32W108CZ
16
2
2
Table
Page size
Embedded memory
3.
2
2
2
2
K Bytes
K Bytes
K Bytes
K Bytes
K Bytes
Unit
29/232