ST72324LK2 STMicroelectronics, ST72324LK2 Datasheet - Page 11

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ST72324LK2

Manufacturer Part Number
ST72324LK2
Description
3V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324LK2

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
16-bit Timer A With
1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to V
27 25 10 13 PC2 (HS)/ICAP2_B
28 26 11 14 PC3 (HS)/ICAP1_B
29 27 12 15
30 28 13 16 PC5/MOSI/AIN14
31 29 14 17 PC6/SCK/ICCCLK
32 30 15 18 PC7/SS/AIN15
34 31 16 19 PA3 (HS)
35 32
36 33
37 34 17 20 PA4 (HS)
38 35
39 36 18 21 PA6 (HS)
40 37 19 22 PA7 (HS)
41 38 20 23 V
42 39 21 24 RESET
43 40 22 25 V
44 41 23 26 OSC2
45 42 24 27 OSC1
46 43 25 28 V
47 44 26 29 PE0/TDO
48 1 27 30 PE1/RDI
3
4
5
6
Pin n°
2 28 31 PB0
3
4
5 29 32 PB3
PC4/MISO/ICCDA-
TA
V
V
PA5 (HS)
PB1
PB2
DD_1
SS_1
PP
SS_2
DD_2
/ICCSEL
Pin Name
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
I/O C
O
S
S
S
S
I
I
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
HS
HS
HS
HS
HS
HS
HS
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Input
ei2
ei2
ei2
ei0
ei2
Port
X
X
Output
X
X
X
X
X
X
X
X
X
T
T
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
function
Port C2
Port C3
Port C4
Port C5
Port C6
Port C7
Port A3
Digital Main Supply Voltage
Digital Ground Voltage
Port A4
Port A5
Port A6
Port A7
Must be tied low. In the flash pro-
gramming mode, this pin acts as the
programming voltage input V
Section 12.9.2
voltage must not be applied to ROM
devices.
Top priority non maskable interrupt.
Digital Ground Voltage
Resonator oscillator inverter output
External clock input or Resonator os-
cillator inverter input
Digital Main Supply Voltage
Port E0
Port E1
Port B0
Port B1
Port B2
Port B3
reset)
(after
Main
1)
1)
Timer B Input Capture 2
Timer B Input Capture 1
SPI Master
In / Slave
Out Data
SPI Master
Out / Slave
In Data
SPI Serial
Clock
SPI Slave
Select (ac-
tive low)
SCI Transmit Data Out
SCI Receive Data In
Alternate Function
for more details. High
ST72324Lxx
5)
5)
ICC Data In-
put
ADC Analog
Input 14
ICC Clock
Output
ADC Analog
Input 15
5)
5)
PP
11/154
. See
DD
1

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