ST72561R9-Auto STMicroelectronics, ST72561R9-Auto Datasheet - Page 99

• Manufacturer Part Number: ST72561R9-Auto
• Description: 8-bit MCU for automotive
• Manufacturer: STMicroelectronics

Specifications of ST72561R9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72561-Auto
11.3
Register description
Control/status register (ARTCSR)
Read/Write
Reset value: 0000 0000 (00h)
Bit 7 = EXCL External Clock
This bit is set and cleared by software. It selects the input clock for the 7-bit prescaler.
Bit 6:4 = CC[2:0] Counter Clock Control
These bits are set and cleared by software. They determine the prescaler division ratio from
f
Table 43.
Bit 3 = TCE Timer Counter Enable
This bit is set and cleared by software. It puts the timer in the lowest power consumption
mode.
Bit 2 = FCRL Force Counter Re-Load
This bit is write-only and any attempt to read it will yield a logical zero. When set, it causes
the contents of ARTARR register to be loaded into the counter, and the content of the
prescaler register to be cleared in order to initialize the timer before starting to count.
Bit 1 = OIE Overflow Interrupt Enable
This bit is set and cleared by software. It allows to enable/disable the interrupt which is
generated when the OVF bit is set.
INPUT
EXCL
0: CPU clock.
1: External clock.
0: Counter stopped (prescaler and counter frozen).
1: Counter running.
0: Overflow Interrupt disable.
1: Overflow Interrupt enable.
7
.
f
f
f
f
INPUT
f
f
f
f
INPUT
INPUT
INPUT
COUNTER
INPUT
INPUT
INPUT
f
INPUT
Counter clock control
/ 128
/ 16
/ 32
/ 64
/ 2
/ 4
/ 8
CC2
CC1
Doc ID 12370 Rev 8
With f
CC0
62.5 kHz
500 kHz
250 kHz
125 kHz
INPUT
8 MHz
4 MHz
2 MHz
1 MHz
=8 MHz
TCE
PWM auto-reload timer (ART)
FCRL
CC2
0
0
0
0
1
1
1
1
OIE
CC1
0
0
1
1
0
0
1
1
OVF
CC0
0
99/324
0
1
0
1
0
1
0
1