ST72325J4 STMicroelectronics, ST72325J4 Datasheet - Page 196

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ST72325J4

Manufacturer Part Number
ST72325J4
Description
8-BIT MCU WITH 16 TO 60K FLASH/ROM, ADC, CSS, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72325J4

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt,Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
16 REVISION HISTORY
Table 33. Revision History
26-Sep-2005
04-Dec-2006
04-Apr-2007
07-Oct-2008
Date
Revision
1
2
3
4
Initial release
Modified LQFP48 pinout, added S device ordering information
Modified Note 4 on
Added caution about reset vector in unprogrammed Flash devices in
Removed EMC protective circuitry in
these components)
Modified SS min. setup time and added note 4 to
Modifed description PKG1 bit in
Added
In
added note 6 on connection of power and ground pins.
Deleted the sentence in
Added Package dimensions for LQFP64 14 x14 in
Specified EMI data for LQFP64 in
Added ‘Pull-up always active on PE2’ in
Title of the document changed
Modified
Modified
Modified t
Modified
Values in inches rounded to 4 decimal digits (instead of 3) in
TA” on page 174
Removed reference to “Application with a Crystal or Ceramic Resonator for ROM (LQFP64
or any 48/60K ROM)” on
Modified
Modified
Modified
TOMER CODE
Table 2
“TIMD set simultaneously with OC interrupt” on page 194
Table 1 on page 1
“Starting the Conversion” on page 133
“Absolute Maximum Ratings (Electrical Sensitivity)” on page 158
“PACKAGE CHARACTERISTICS” on page 174 (Section
“TIMD set simultaneously with OC interrupt” on page 194
Section 14.2 DEVICE ORDERING INFORMATION AND TRANSFER OF CUS-
RET
added note 5 for I/O Port E2 (PE2) output mode “pull-up always activated” and
and N
on
page 183 (Figure 106
page 16
RW
values in
Section 4.3.1
page 151
for unbonded pins in 48 pin C devices
Description of Changes
“FLASH OPTION BYTES” on page 181
“FLASH Memory” on page 155
Section 12.7.2
Figure 88 on page 163
‘Readout protection is not supported if LVD is enabled
Section 15.1.8
and option lists)
section 12.11.1 on page 166
Figure 122
“PACKAGE MECHANICAL DA-
(device works correctly without
13.3)
Section
ST72325xx
6.3.
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