ST92150JDV1TAuto STMicroelectronics, ST92150JDV1TAuto Datasheet - Page 5
ST92150JDV1TAuto
Manufacturer Part Number
ST92150JDV1TAuto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet
1.ST92150JDV1QAUTO.pdf
(430 pages)
Specifications of ST92150JDV1TAuto
Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
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1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST92124-Auto/150-Auto/250-Auto microcon-
troller is developed and manufactured by STMicro-
electronics using a proprietary n-well HCMOS
process. Its performance derives from the use of a
flexible 256-register programming model for ultra-
fast context switching and real-time event re-
sponse. The intelligent on-chip peripherals offload
the ST9 core from I/O and data management
processing tasks allowing critical application tasks
to get the maximum use of core resources. The
new-generation ST9 MCU devices now also sup-
port low power consumption and low voltage oper-
ation for power-efficient and low-cost embedded
systems.
1.1.1 ST9+ Core
The advanced Core consists of the Central
Processing Unit (CPU), the Register File, the Inter-
rupt and DMA controller, and the Memory Man-
agement Unit. The MMU allows a single linear ad-
dress space of up to 4 Mbytes.
Four independent buses are controlled by the
Core: a 22-bit memory bus, an 8-bit register data
bus, an 8-bit register address bus and a 6-bit inter-
rupt/DMA bus which connects the interrupt and
DMA controllers in the on-chip peripherals with the
core.
This multiple bus architecture makes the ST9 fam-
ily devices highly efficient for accessing on and off-
chip memory and fast exchange of data with the
on-chip peripherals.
The general-purpose registers can be used as ac-
cumulators, index registers, or address pointers.
Adjacent register pairs make up 16-bit registers for
addressing or 16-bit processing. Although the ST9
has an 8-bit ALU, the chip handles 16-bit opera-
tions, including arithmetic, loads/stores, and mem-
ory/register and memory/memory exchanges.
The powerful I/O capabilities demanded by micro-
controller
ST92150-Auto/124-Auto with 48 (64-pin devices)
or 77 (100-pin devices) I/O lines dedicated to dig-
ital Input/Output and with 80 I/O lines by the
ST92250-Auto. These lines are grouped into up to
ten 8-bit I/O Ports and can be configured on a bit
basis under software control to provide timing, sta-
tus signals, an address/data bus for interfacing to
the external memory, timer inputs and outputs, an-
alog inputs, external interrupts and serial or paral-
lel I/O. Two memory spaces are available to sup-
port this wide range of configurations: a combined
applications
are
fulfilled
by
the
ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
Program/Data Memory Space and the internal
Register File, which includes the control and sta-
tus registers of the on-chip peripherals.
1.1.2 External Memory Interface
100-pin devices have a 22-bit external address
bus allowing them to address up to 4M bytes of ex-
ternal memory.
1.1.3 On-chip Peripherals
Two 16-bit Multifunction Timers, each with an 8 bit
Prescaler and 12 operating modes allow simple
use for complex waveform generation and meas-
urement, PWM functions and many other system
timing functions by the usage of the two associat-
ed DMA channels for each timer.
Two Extended Function Timers provide further
timing and signal generation capabilities.
A Standard Timer can be used to generate a sta-
ble time base independent from the PLL.
An I
provides fast I
The SPI is a synchronous serial interface for Mas-
ter and Slave device communication. It supports
single master and multimaster systems.
A J1850 Byte Level Protocol Decoder is available
(ST92150JDV1-Auto device only) for communicat-
ing with a J1850 network.
The bxCAN (basic extended) interface (two in the
ST92150JDV1-Auto device) supports 2.0B Active
protocol. It has 3 transmit mailboxes, 2 independ-
ent receive FIFOs and 8 filters.
In addition, there is an 16 channel Analog to Digital
Converter with integral sample and hold, fast con-
version time and 10-bit resolution.
There is one Multiprotocol Serial Communications
Interface with an integral generator, asynchronous
and synchronous capability (fully programmable
format) and associated address/wake-up option,
plus two DMA channels.
On 100-pin devices, there is an additional asyn-
chronous Serial Communications interface with
13-bit LIN Synch Break generation capability.
Finally, a programmable PLL Clock Generator al-
lows the usage of standard 3 to 5 MHz crystals to
obtain a large range of internal frequencies up to
24 MHz. Low power Run (SLOW), Wait For Inter-
rupt, low power Wait For Interrupt, STOP and
HALT modes are also available.
2
C interface (two in the ST92250-Auto device)
2
C and Access Bus support.
5/430
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