ST72260G1 STMicroelectronics, ST72260G1 Datasheet - Page 12

• Manufacturer Part Number: ST72260G1
• Description: 8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
• Manufacturer: STMicroelectronics

Specifications of ST72260G1

• 4 K Or 8 Kbytes Program Memory: ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
• 4 Power Saving Modes: Halt, Active Halt,Wait and Slow
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes

ST72260Gx, ST72262Gx, ST72264Gx
12/172
Address
003Ch
003Dh
004Ch
004Dh
003Ah
003Bh
003Eh
003Fh
004Ah
004Bh
004Eh
004Fh
006Eh
006Fh
007Fh
0031h
0032h
0033h
0034h
0035h
0036h
0037h
0038h
0039h
0040h
0041h
0042h
0043h
0044h
0045h
0046h
0047h
0048h
0049h
0050h
0051h
0052h
0053h
0054h
0055h
0056h
0057h
0070h
0071h
0072h
0073h
to
to
TIMER A
TIMER B
FLASH
Block
ADC
SCI
TACR2
TACR1
TASCSR
TAIC1HR
TAIC1LR
TAOC1HR
TAOC1LR
TACHR
TACLR
TAACHR
TAACLR
TAIC2HR
TAIC2LR
TAOC2HR
TAOC2LR
MISCR2
TBCR2
TBCR1
TBSCSR
TBIC1HR
TBIC1LR
TBOC1HR
TBOC1LR
TBCHR
TBCLR
TBACHR
TBACLR
TBIC2HR
TBIC2LR
TBOC2HR
TBOC2LR
SCISR
SCIDR
SCIBRR
SCICR1
SCICR2
SCIERPR
SCIETPR
ADCDRL
ADCDRH
ADCCSR
Register
FCSR
Label
Timer A Control Register 2
Timer A Control Register 1
Timer A Control/Status Register
Timer A Input Capture 1 High Register
Timer A Input Capture 1 Low Register
Timer A Output Compare 1 High Register
Timer A Output Compare 1 Low Register
Timer A Counter High Register
Timer A Counter Low Register
Timer A Alternate Counter High Register
Timer A Alternate Counter Low Register
Timer A Input Capture 2 High Register
Timer A Input Capture 2 Low Register
Timer A Output Compare 2 High Register
Timer A Output Compare 2 Low Register
Miscellanous register 2
Timer B Control Register 2
Timer B Control Register 1
Timer B Control/Status Register
Timer B Input Capture 1 High Register
Timer B Input Capture 1 Low Register
Timer B Output Compare 1 High Register
Timer B Output Compare 1 Low Register
Timer B Counter High Register
Timer B Counter Low Register
Timer B Alternate Counter High Register
Timer B Alternate Counter Low Register
Timer B Input Capture 2 High Register
Timer B Input Capture 2 Low Register
Timer B Output Compare 2 High Register
Timer B Output Compare 2 Low Register
SCI Status Register
SCI Data Register
SCI Baud Rate Register
SCI Control Register1
SCI Control Register2
SCI Extended Receive Prescaler Register
SCI Extended Transmit Prescaler Register
Data Register Low
Data Register High
Control/Status Register
Flash Control Register
Reserved (24 Bytes)
Reserved (13 Bytes)
Register Name
3)
3)
x000 0000h
Status
Reset
FCh
FCh
FCh
FCh
FFh
FFh
FFh
FFh
C0h
00h
00h
80h
00h
80h
00h
00h
00h
00h
80h
00h
80h
00h
00h
00h
00h
00h
00h
00h
00h
00h
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
xxh
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
R/W
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
R/W
R/W
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
Read Only
Read Only
R/W
Remarks
R/W