ST72361AR9-Auto STMicroelectronics, ST72361AR9-Auto Datasheet - Page 185

• Manufacturer Part Number: ST72361AR9-Auto
• Description: 8-bit MCU for automotive with K Flash, 10-bit ADC, 5 Timers, SPI, 2x LINSCI
• Manufacturer: STMicroelectronics

Specifications of ST72361AR9-Auto

• Hdflash Endurance: 100 cycles, data retention 20 years at 55 °C
• 5 Power Saving Modes: halt, auto wake up from halt, active halt, wait and slow

ST72361xx-Auto
15.10.2
15.10.3
Note:
Note:
Control Register 1 (SCICR1)
Read/ write
Reset value: x000 0000 (x0h)
Bits 7:3 = Same function as in SCI mode, please refer to
description.
Bit 2 = PCE Parity control enable.
This bit is set and cleared by software. It selects the hardware parity control for LIN identifier
parity check.
When a parity error occurs, the PE bit in the SCISR register is set.
Bit 1 = reserved
Bit 0 = same function as in SCI mode, please refer to
description.
Control Register 2 (SCICR2)
Read/ write
Reset value: 0000 0000 (00h)
Bits 7:2 = same function as in SCI mode, please refer to
description.
Bit 1 = RWU Receiver wake-up.
This bit determines if the SCI is in mute mode or not. It is set and cleared by software and
can be cleared by hardware when a wake-up sequence is recognized.
Mute mode is recommended for detecting only the header and avoiding the reception of any
other characters. For more details please refer to
In LIN slave mode, when RDRF is set, the software can not set or clear the RWU bit.
Bit 0 = SBK Send break.
This bit set is used to send break characters. It is set and cleared by software.
If the SBK bit is set to “1” and then to “0”, the transmitter will send a BREAK word at the end
of the current word.
TIE
R8
0: parity control disabled
1: parity control enabled
0: receiver in active mode
1: receiver in mute mode
0: no break character is transmitted
1: break characters are transmitted
7
7
TCIE
T8
SCID
RIE
LINSCI serial communication interface (LIN master/slave)
Doc ID 12468 Rev 3
ILIE
M
WAKE
LIN
TE
Section 15.8: SCI mode register
reception.
Section 15.8: SCI mode register
Section 15.8: SCI mode register
PCE
RE
RWU
PS
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SBK
PIE
0
0