ST72264G2 STMicroelectronics, ST72264G2 Datasheet - Page 39

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ST72264G2

Manufacturer Part Number
ST72264G2
Description
8-bit MCU
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72264G2

4 K Or 8 Kbytes Program Memory
ROM or single voltage extended Flash (XFlash) with read-out protection, write protection, In-Circuit Programming and In-Application Programming (ICP and IAP). 10K write/erase cycles guaranteed, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
4 Power Saving Modes
Halt, Active Halt,Wait and Slow
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and Pulse generator modes
I/O PORTS (Cont’d)
Figure 27. I/O Port General Block Diagram
Table 7. I/O Port Mode Options
Legend:NI - not implemented
Input
Output
REGISTER
ACCESS
INTERRUPT
REQUEST (ei
EXTERNAL
Off - implemented not activated
On - implemented and activated
DDR SEL
OR SEL
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
OR
DR
x
)
SENSITIVITY
SELECTION
ALTERNATE
OUTPUT
From on-chip periphera
ALTERNATE
ENABLE
BIT
If implemented
1
0
Combinational
Logic
l
1
0
FROM
OTHER
BITS
Pull-Up
Note: Refer to the Port Configuration
table for device specific information.
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
ST72260Gx, ST72262Gx, ST72264Gx
N-BUFFER
PULL-UP
CONDITION
P-Buffer
Off
On
Off
NI
OL
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
is not implemented in the
to V
On
DD
P-BUFFER
(see table below)
To on-chip peripheral
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
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