LNBH23L STMicroelectronics, LNBH23L Datasheet - Page 16

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LNBH23L

Manufacturer Part Number
LNBH23L
Description
LNB supply and control IC with step-up and I2C interface
Manufacturer
STMicroelectronics
Datasheet

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LNBH23L software description
7
7.1
7.2
7.3
16/25
S
Mode
Write
Read
MSB
0
0
LNBH23L software description
Interface protocol
The interface protocol comprises:
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, two addresses selectable by ADDR pin (see
System register (SR, 1 byte)
Write = control bits functions in write mode
Read= diagnostic bits in read mode.
All bits reset to 0 at Power-on
Transmitted data (I²C bus write mode)
When the R/W bit in the chip address is set to 0, the main microprocessor can write on the
system register (SR) of the LNBH23L via I²C bus. 6 bits are available and can be written by
the microprocessor to control the device functions as per the below truth table
TEST1
Section address (A or B)
MSB
PCL
0
A start condition (S)
A chip address byte (the LSB bit determines read (=1)/write (=0) transmission)
A sequence of data (1 byte + acknowledge)
A stop condition (P)
1
TEST2
0
TTX
1
X
TEST3
TEN
LSB
R/W ACK
Doc ID 15335 Rev 4
LLC
LLC
MSB
VSEL
VSEL
Table
Data
10)
EN
EN
TEST4
OTF
LSB
Table
LNBH23L
ACK
TEST5
LSB
OLF
6.
P

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