LNBH23L STMicroelectronics, LNBH23L Datasheet - Page 18

• Manufacturer Part Number: LNBH23L
• Description: LNB supply and control IC with step-up and I2C interface
• Manufacturer: STMicroelectronics

LNBH23L software description
Table 7.
7.5
7.6
7.7
18/25
TEST1
X
TEST2
X
Register
Values are typical unless otherwise specified.
x = don’t care.
Power-on I²C interface reset
I²C interface built in LNBH23L is automatically reset at power-on. As long as the V
below the under voltage lockout (UVL) threshold (6.7 V), the interface does not respond to
any I²C command and the system register (SR) is initialized to all zeroes, thus keeping the
power blocks disabled. Once the V
operative and the SR can be configured by the main microprocessor. This is due to 500 mV
of hysteresis provided in the UVL threshold to avoid false retriggering of the power-on reset
circuit.
Address pin
It is possible to select two I²C interface addresses by means of ADDR pin. This pin is TTL
compatible and can be set as per address pin characteristics
DiSEqC™ implementation
LNBH23L helps system designer to implement DiSEqC 1.x protocol by allowing an easy
PWK modulation of the 22 kHz carrier through the EXTM and V
the system to the specification is thus not implied by the bare use of the LNBH23L (see
Figure
TEST3
3,
X
Figure 4
exactly the same as
LLC
These bits are read
last write operation
they were left after
and
VSEL
Figure
EN
5).
Doc ID 15335 Rev 4
CC
OTF
0
1
rises above 7.3 V typ. The I²C interface becomes
OLF
0
1
T
T
I
I
These bits status must be disregarded by the
MCU.
O
O
J
J
< I
> I
< 135°C, normal operation
> 150°C, power blocks disabled
OMAX
OMAX
, normal operation
, Overload protection triggered
Table
oTX
Function
pins. Full compliance of
10.
LNBH23L
CC
stays