71M6541D Maxim, 71M6541D Datasheet - Page 146

• Manufacturer Part Number: 71M6541D
• Description: The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

71M6541D/F/G and 71M6542F/G Data Sheet
6.4.13 VLCD Generator
146
Parameter
VSYS to VLCD switch impedance
VBAT to VLCD switch impedance
LCD Boost Frequency
VLCD IOH current
From LCDADJ0 and LCDADJ12 fuses:
The above equations describe the nominal value of VLCD for a specific LCD_DAC value. The
specifications below list the maximum deviation between actual VLCD and VLCDnom. Note that when
VCC and boost are insufficient, the LCD DAC will not reach its target value and a large negative error
will occur.
LCD_DAC Error. VLCD-VLCDnom
(see note 2)
Full Scale, with Boost
LCD_DAC Error. VLCD-VLCDnom
DAC=12, with Boost
LCD_DAC Error. VLCD-VLCDnom
Zero Scale, with Boost
LCD_DAC Error. VLCD-VLCDnom
Full Scale, no Boost
VBAT=4.0 V, V3P3=0, BRN Mode
VBAT=2.5 V, V3P3=0, BRN Mode
(VLCD(0)-VLCD(IOH)<0.25)
V3P3 =3.6 V
V3P3 =3.0 V
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V
V3P3 = 3.0 V
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
V3P3 = 3.6 V (see note 2)
V3P3 = 3.0 V (see note 2)
VBAT = 4.0 V, V3P3 = 0 V, BRN Mode
VBAT = 2.5 V, V3P3 = 0 V, BRN Mode
(see note 2)
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��������
������
Table 108: LCD Driver Performance Specifications
( ������_������ ) = 2.65 + 2.65
Condition
V3P3 = 3.3 V,
RVLCD=removed, LCD_BAT=0,
LCD_VMODE[1:0]=0,
∆ILCD=10 µA
V3P3 = 0 V, VBAT = 2.5 V,
RVLCD =removed, LCD_BAT =1,
LCD_VMODE[1:0]=0,
∆ILCD=10 µA
LCD_VMODE[1:0] = 2,
RVLCD = removed,
CVLCD = removed
LCD_VMODE[1:0] = 2,
LCD_CLK[1:0] = 2,
RVLCD = removed,
V3P3 = 3.3V,
LCD_DAC[4:0] = 1F
LCD_VMODE[1:0] = 2,
LCD_DAC[4:0] = 1F,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE[1:0] = 2,
LCD_DAC[4:0] = C,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE[1:0] = 2,
LCD_DAC[4:0] =0,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
LCD_VMODE[1:0] = 1,
LCD_DAC[4:0] = 1F,
LCD_CLK[1:0]=2,
LCD_MODE[2:0]=6
PLL_FAST=1
PLL_FAST=0
������_������
������������12 − ������������0
31
+ ������������ ( ������_������ )
12
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
-0.15
Min
-0.4
-1.3
-2.1
-2.8
-1.8
-3.2
10
������_�������
1
Typ
820
786
Max
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
0.15
750
700
Unit
kHz
kHz
Rev 2
µA
Ω
Ω
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V