71M6541D Maxim, 71M6541D Datasheet - Page 159
71M6541D
Manufacturer Part Number
71M6541D
Description
The 71M6541D/71M6541F/71M6541G/71M6542F/71M6542G are Teridian™ 4th-generation single-phase metering SoCs with a 5MHz 8051-compatible MPU core, low-power RTC with digital temperature compensation, flash memory, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6541D.pdf
(166 pages)
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6.9.2
†
Rev 2
(64 pin)
Pin VB only available on 71M6542F/G.
Pin
55
54
44
43
52
56
48
49
--
Analog Pins
(100-pin)
Pin
82
83
87
86
68
67
88
75
76
Name
IAP-
IAN
IBP-
IBN
VA
VB
VREF
XIN
XOUT
†
Type Circuit Description
O
O
I
I
I
Table 120: Analog Pins
6
6
9
8
Differential or single-ended Line Current Sense Inputs:
These pins are voltage inputs to the internal A/D
converter. Typically, they are connected to the outputs
of current sensors. Unused pins must be tied to
V3P3A.
Pins IBP-IBN may be configured for communication with
the remote sensor interface (71M6x01). When RMT_E =
1 (I/O RAM 0x2709[3]), the IBP-IBN pins become
balanced differential pair. If unused, RMT_E must be
zero and IBP-IBN must tied to V3P3A.
Line Voltage Sense Inputs: These pins are voltage
inputs to the internal A/D converter. Typically, they are
connected to the outputs of resistor dividers. Unused
pins must be tied to V3P3A.
Voltage Reference for the ADC. This pin should be left
unconnected (floating).
Crystal Inputs: A 32 kHz crystal should be connected
across these pins. Typically, a 15 pF capacitor is also
connected from XIN to GNDA and a
10 pF capacitor is connected from XOUT to GNDA. It
is important to minimize the capacitance between these
pins. See the crystal manufacturer datasheet for details.
If an external clock is used, a 150 mV (p-p) clock signal
should be applied to XIN, and XOUT should be left
unconnected.
71M6541D/F/G and 71M6542F/G Data Sheet
159
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