EL4583AISZ Intersil, EL4583AISZ Datasheet - Page 8

• Manufacturer Part Number: EL4583AISZ
• Description: IC VIDEO SYNC SEPARATOR 16-SOIC
• Manufacturer: Intersil
• Type: Synchronous Separatorr

Specifications of EL4583AISZ

• Applications: Multimedia Displays, Test Equipment
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Description of Operation
A simplified block schematic is shown in Figure 1. The
following description is intended to provide the user with
sufficient information to understand the effects of the
external components and signal conditions on the outputs of
the integrated circuit.
The video signal is AC coupled to pin 4 via the capacitor C
nominally 0.1µF. The clamp circuit A1 will prevent the input
signal on pin 4 going more negative than 1.5V, the value of
reference voltage V
part of the video waveform, will be clamped at 1.5V. The
current source I
capacitor during the remaining portion of the H line,
approximately 58µs for a 15.75kHz timebase. From I • t = C •
V, the video time-constant can be calculated. It is important
to note that the charge taken from the capacitor during video
must be replaced during the sync tip time, which is much
shorter, (ratio of x 12.5). The corresponding current to
restore the charge during sync will therefore be an order of
magnitude higher, and any resistance in series with C
cause sync tip crushing. For this reason, the internal series
resistance has been minimized and external high resistance
values in series with the input coupling capacitor should be
avoided. The user can exercise some control over the value
1
, nominally 6µA, charges the coupling
R1
. Thus the sync tip, the most negative
8
FIGURE 4. STANDARD (NTSC INPUT) H. SYNC DETAIL
I
will
1
EL4583A
,
of the input time constant by introducing an external pull-up
resistance from pin 4 to the 5V supply. The maximum
voltage across the resistance will be V
level. For a net discharge current greater than zero, the
resistance should be greater than 450k. This will have the
effect of increasing the time constant and reducing the
degree of picture tilt. The current source I
reference current I
adjustment, as explained later.
The signal is processed through an active 3 pole filter (F1)
designed for minimum ripple with constant phase delay. The
filter attenuates the color burst by 12dB and eliminates fast
transient spikes without sync crushing. An external filter is
not necessary. The filter also amplifies the video signal by
6dB to improve the detection accuracy. The filter cut-off
frequency is controlled by an external resistor from pin 1 to
ground.
Internal reference voltages (block V
to supply voltage variation are derived on the chip.
Reference V
voltage of 1.7V nominal. Consequently, it can be seen that
the external resistance R
reference current I
about 6kΩ, much less than R
R4
with op-amp A2 forces pin 12 to a reference
TR
TR
. The internal resistance R3 is only
and thus increases with scan rate
SET
SET
will determine the value of the
. All the internal timing
REF
DD
) with high immunity
less 1.5V, for black
1
directly tracks
November 12, 2010
FN7503.2