74LVT244APW,118 NXP Semiconductors, 74LVT244APW,118 Datasheet - Page 6

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74LVT244APW,118

Manufacturer Part Number
74LVT244APW,118
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT244APW,118

Package / Case
20-TSSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
LVT
Number Of Channels Per Chip
8
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
12000 uA
Low Level Output Current
32 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Output Current
128 mA
Output Type
3-State
Output Voltage
7 V
Propagation Delay Time
2.6 ns (Typ) @ 3.3 V
Logical Function
Buffer/Line Driver
Number Of Elements
2
Number Of Channels
8
Number Of Inputs
8
Number Of Outputs
8
Operating Supply Voltage (typ)
3.3V
Package Type
TSSOP
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2.7V
Quiescent Current
12mA
Technology
BiCMOS
Pin Count
20
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Number Of Lines (input / Output)
8 / 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2316-2
74LVT244APW-T
935176380118
NXP Semiconductors
Table 6.
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
[4]
[5]
[6]
10. Dynamic characteristics
Table 7.
Voltages are referenced to GND (ground = 0 V); for test circuit see
74LVT_LVTH244A_4
Product data sheet
Symbol Parameter
I
I
C
C
Symbol
T
t
t
t
t
t
OZ
CC
PLH
PHL
PZH
PZL
PHZ
I
amb
I
O
CC
All typical values are at T
Unused pins at V
This is the bus hold overdrive current required to force the input to the opposite logic state.
This parameter is valid for any V
a transition time of 100 s is permitted. This parameter is valid for T
I
This is the increase in supply current for each input at the specified voltage level other than V
CC
= 40 C to +85 C
is measured with outputs pulled to V
OFF-state output current
supply current
additional supply current
input capacitance
output capacitance
Static characteristics
Dynamic characteristics
Parameter
LOW to HIGH
propagation delay
HIGH to LOW
propagation delay
OFF-state to HIGH
propagation delay
OFF-state to LOW
propagation delay
HIGH to OFF-state
propagation delay
CC
or GND.
[1]
amb
= 25 C.
CC
…continued
between 0 V and 1.2 V with a transition time of up to 10 ms. From V
Conditions
nAn to nYn; see
nAn to nYn; see
see
see
see
CC
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
Figure 6
Figure 6
Figure 6
or GND.
Conditions
V
V
I
per input pin; V
one input at V
inputs at V
V
outputs disabled; V
O
CC
CC
I
= 2.7 V
= 3.0 V to 3.6 V
= 2.7 V
= 3.0 V to 3.6 V
= 2.7 V
= 3.0 V to 3.6 V
= 2.7 V
= 3.0 V to 3.6 V
= 2.7 V
= 3.0 V to 3.6 V
V
V
output HIGH
output LOW
outputs disabled
= 0 A
= 0 V or 3.0 V
O
O
= 3.6 V; V
= 3.6 V; V
Rev. 04 — 3 September 2008
= 3.0 V
= 0.5 V
CC
Figure 5
Figure 5
or GND
CC
I
I
CC
= V
= GND or V
= 3.0 V to 3.6 V;
0.6 V and other
IH
O
= 0 V or 3.0 V
amb
74LVT244A; 74LVTH244A
or V
Figure
= 25 C only.
IL
CC
;
7.
3.3 V octal buffer/line driver; 3-state
Min
1.1
1.9
[5]
[6]
1
1
1
-
-
-
-
-
CC
Min
or GND.
-
-
-
-
-
-
-
5
Typ
CC
2.5
2.6
3.2
3.1
3.3
-
-
-
-
-
= 1.2 V to V
0.13
0.13
Typ
0.1
1
3
4
8
1
© NXP B.V. 2008. All rights reserved.
Max
5.0
4.1
5.1
4.1
6.3
5.2
6.7
5.2
6.3
5.6
CC
Max
0.19
0.19
= 3.3 V
0.2
12
5
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
mA
mA
mA
mA
pF
pF
6 of 15
A
A
0.3 V

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