TB6572AFG*** Toshiba, TB6572AFG*** Datasheet - Page 10

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TB6572AFG***

Manufacturer Part Number
TB6572AFG***
Description
Manufacturer
Toshiba
Datasheet

Specifications of TB6572AFG***

Function
Controller
Vopmax (vm*)
17V (30V)
Io (lpeak)
20mA
Sinusoidal Current Wave
yes
Sensor-less
no
Speed Feedback Loop
yes
Package
QFP52
Rohs Compatible†
yes
2. Generating an Internal Reference Clock
3. Generating Triangular Waves
4. Dead time Setup Circuit
5. Charge Pump
6. Motor Output Pins
Dead Time
The TB6572AFG uses external C and R to generate a reference clock internally.
It uses the reference clock to generate triangular waves, which determine the carrier frequency, and set a
dead time.
The clock also functions as a reference clock for the charge pump (booster) and lead angle circuit ADC.
The TB6572AFG compares the modulation waveforms with triangular waves to generate PWM signals.
The carrier frequency for PWM control depends on the frequency of the triangular waves.
The triangular waves are switched according to the internal reference clock frequency.
The following formula obtains the PWM frequency, where f
PWM frequency f
For example: When f
To apply PWM control with synchronous regeneration for output FETs, the TB6572AFG sets a dead time for
energization signal outputs, thus preventing the upper and lower output power FETs from turning on
simultaneously.
It uses the internal reference clock, generated from external CR, to set a dead time.
The following formula obtains the dead time, where f
Dead time td = (1/f
For example: When f
The TB6572AFG incorporates a charge pump to drive two N-ch FETs in the external output FET
configuration, in particular, to generate the gate voltage for the upper N-ch FET.
The booster voltage is V
The charge pump boosts the voltage using a frequency that is 1/16 of the internal reference clock frequency,
f
During PWM operation, the source voltage for the upper external N-ch FET swings between GND and V
V
x2
GS
(250 kHz when f
for the Nch-FET is clamped so that it does not exceed V
(LB (U), LC (U) )
(LB (L), LC (L) )
LA (L)
LA (U)
When f
When f
When f
When f
pwm
x2
x2
) × 4
x2
x2
x2
x2
x2
x2
= f
= 4 MHz).
= 5 MHz: fpwm = 19.8 kHz
= 4 MHz: f
= 3 MHz: f
= 5 MHz: td = 1.2 μs
= 4 MHz: td = 1.5 μs
= 3 MHz: td = 2.0 μs
CC
x2
/252 (= triangular wave frequency)
= 8 V and the upper gate drive voltage is V
TOFF
pwm
pwm
= 15.8 kHz
= 11.9 kHz
10
x2
TOFF
is the internal reference clock frequency:
x2
GS
is the internal reference clock frequency:
(max) = 20 V.
CC
= 7.75 V.
TB6572AFG
2008-1-21
M
.

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