TB6572AFG*** Toshiba, TB6572AFG*** Datasheet - Page 18

• Manufacturer Part Number: TB6572AFG***
• Manufacturer: Toshiba

Specifications of TB6572AFG***

• Function: Controller
• Vopmax (vm*): 17V (30V)
• Io (lpeak): 20mA
• Sinusoidal Current Wave: yes
• Sensor-less: no
• Speed Feedback Loop: yes
• Package: QFP52
• Rohs Compatible†: yes

15. Automatic Phase Lead Angle Correction Circuit
16. Lock Protection Circuit
current
Motor
Automatic Lead angle Correction
RF
Timing charts may be simplified for explanatory purposes.
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*: Gain = (R2 + R3)/R2
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The lead angle correction circuitry is incorporated, and the motor current value flows into the circuit.
The circuit can advance the phase of an energization signal relative to the induced voltage for input of 0
to 2.5 V (16 steps).
0 V → 0°
2.5 V → 29° (29° for an input voltage higher than 2.5 V)
The circuit clamps the lead angle at 29°.
It logically clamps the angle between 0° and 29°, rather than clamping the input voltage.
The circuit turns the output power FET off if the motor is locked.
It turns off both upper and lower output power FETs if it detects the Ready signal with the following
condition satisfied.
The circuit latched state is terminated once the TB6572AFG is placed in the stop or brake state.
A reference oscillation waveform for lock protection is generated using an external capacitor connected to
the CLD pin and counted with the internal 7-bit counter.
When CLD = 0.1 μF, the oscillation frequency is approximately 25 Hz, so that the lock protection
triggering time is 5.1 seconds (typ.).
Detected Signal
Ready signal
V
VRF
R2
V
RF
Amp.
The Ready signal output remains high for at least 5 seconds (typ.).
R3
58°
29°
0°
0
Gain × V
Gain × V
Condition for Triggering Lock Protection
RF
2.5 V
R4
LA
Peak hold
RF
5 V
C2
Gain × V
18
(peak)
Gain x VRF
RF
(peak)
< This graph is presented only as a guide. >
Buffer
100 kΩ (typ.)
C3
LA value
LA value
TB6572AFG
A-D conversion
T [s]
2008-1-21