TB6572AFG*** Toshiba, TB6572AFG*** Datasheet - Page 3

• Manufacturer Part Number: TB6572AFG***
• Manufacturer: Toshiba

Specifications of TB6572AFG***

• Function: Controller
• Vopmax (vm*): 17V (30V)
• Io (lpeak): 20mA
• Sinusoidal Current Wave: yes
• Sensor-less: no
• Speed Feedback Loop: yes
• Package: QFP52
• Rohs Compatible†: yes

Pin Functions
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
1
2
3
4
5
6
7
8
9
INTEG-out Integral amp output
CW/CCW
INTEG-in
BRAKE
Vref1-R
VCO-R
VCO-C
S-GND
P-GND
START
Ready
Name
FGin+
FGin−
SEL1
SEL2
D-out
P-out
Vref2
Vref1
VDD
VCC
HC+
HC−
FGS
HB+
HB−
FGo
CLd
CP2
Fref
LP1
Td1
Td2
L1
L2
L3
L4
Phase-B hall signal input + pin
Phase-B hall signal input − pin
Phase-C hall signal input + pin
Phase-C hall signal input − pin
FG amplifier input + pin
FG amplifier input − pin
FG amplifier output pin
Forward/reverse switching pin
Brake
Start
External clock input
FG hysteresis comparator output pin
Ready output pin
Gain Select 1
Gain Select 2
For LPF
Resistor pin for VCO
Capacitor pin for VCO
Ground pin
Integral amp input
Speed discriminator deviation output
Phase deviation output
Frequency setting pin 1 for internal
reference clock
Frequency setting pin 2 for internal
reference clock
Lead angle correction circuit
Lead angle correction circuit
Lead angle correction circuit
Lead angle correction circuit
Oscillation pin for lock protection circuit
Internal logic power supply pin
Ground pin
8-V reference power supply
5-V reference power supply
5-V reference power supply
Voltage input pin for control power supply
Charge pump pin
Pin Functions
3
Input the positive phase-B Hall device signal.
Input the negative phase-B Hall device signal.
Input the positive phase-C Hall device signal.
Input the negative phase-C Hall device signal.
FG signal input
FG signal input
Pull-up resistor: 50 kΩ (typ.),H: Reverse/L: Forward
Pull-up resistor: 50 kΩ (typ.), L for braking
(all-phase ON for lower circuit)
Pull-up resistor: 50 kΩ (typ.), L for start, H for standby
Pull-up resistor: 50 kΩ (typ.)
Open collector output, I
Open collector output
Within ±6%: L, Otherwise: High impedance
Selectable from four values. 25-kΩ pull-up resistor (typ.)
Selectable from four values. 25-kΩ pull-up resistor (typ.)
PLL form an external clock
A resistor should be added between this pin and ground.
A capacitor should be added between this pin and ground.
Negative pin
Connect external CR to generate a reference clock.
Connect external CR to generate a reference clock.
Connect an external capacitor.
Connect an external resistor for adjusting the correction
gain.
Connect an external resistor for adjusting the correction
gain.
Connect an external capacitor
A capacitor should be added between this pin and ground
5-V output. A capacitor should be added between this pin
and ground.
8-V output. A capacitor should be added between this pin
and ground.
5-V output. A capacitor should be added between this pin
and ground.
A resistor should be added between VCC and Vref1-R.
V
For generating upper N-ch FET gate voltage
CC
(opr.) = 10 to 28 V
O
Remarks
= 1 mA (max)
TB6572AFG
2008-1-21