74LVC2G34GV,125 NXP Semiconductors, 74LVC2G34GV,125 Datasheet - Page 12

IC BUFFER DL NON-INVERTING 6TSOP

74LVC2G34GV,125

Manufacturer Part Number
74LVC2G34GV,125
Description
IC BUFFER DL NON-INVERTING 6TSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC2G34GV,125

Package / Case
SC-74-6
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
2
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Input Bias Current (max)
40 uA
Low Level Output Current
32 mA
Minimum Operating Temperature
- 40 C
Propagation Delay Time
2.5 ns (Typ) @ 2.7 V or 2.2 ns (Typ) @ 3.3 V or 1.9 ns (Typ) @ 5 V
Number Of Lines (input / Output)
2 / 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC2G34GV-G
74LVC2G34GV-G
935273784125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC2G34GV,125
Manufacturer:
PANASONIC
Quantity:
1 760
NXP Semiconductors
Fig 13. Package outline SOT1115 (XSON6)
74LVC2G34
Product data sheet
XSON6: extremely thin small outline package; no leads;
6 terminals; body 0.9 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1115
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
0.20
0.15
0.12
b
IEC
0.95
0.90
0.85
terminal 1
index area
D
e
(6×)
1.05
1.00
0.95
L
(2)
E
1
0.55
JEDEC
e
All information provided in this document is subject to legal disclaimers.
1
6
0.3
e
e
1
1
References
Rev. 5 — 2 September 2010
D
2
5
0.35
0.30
0.27
0
L
e
1
0.40
0.35
0.32
L
b
3
4
1
JEITA
scale
0.5
A
L
E
1
A
1 mm
(4×)
(2)
European
projection
74LVC2G34
© NXP B.V. 2010. All rights reserved.
Dual buffer gate
Issue date
10-04-02
10-04-07
sot1115_po
SOT1115
12 of 17

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